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path: root/src/gallium/drivers/radeon
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* radeon/llvm: Remove AMDILMCCodeEmitter.cppTom Stellard2012-05-102-158/+0
* radeon/llvm: Remove SILowerShaderInstructions.cppTom Stellard2012-05-104-81/+0
* radeonsi/llvm: Move lowering of RETURN to ConvertToISA passTom Stellard2012-05-102-11/+2
* radeon/llvm: Add some commentsTom Stellard2012-05-1064-422/+393
* radeon/llvm: Move util functions into AMDGPU namespaceTom Stellard2012-05-103-39/+37
* radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_egTom Stellard2012-05-102-17/+0
* radeon/llvm: Delete all instructions that have been custom loweredTom Stellard2012-05-101-4/+1
* radeon/llvm: Remove AMDGPUConstants.pmTom Stellard2012-05-092-45/+23
* radeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_constTom Stellard2012-05-095-38/+20
* radeon/llvm: Make sure the LOAD_CONST def uses the isSI predicateTom Stellard2012-05-092-7/+7
* radeon/llvm: Remove AMDILUtilityFunctions.cppTom Stellard2012-05-0813-1041/+399
* radeon/llvm: Remove some unused functions from AMDILInstrInfoTom Stellard2012-05-082-164/+0
* radeon/llvm: Add some comments and fix coding styleTom Stellard2012-05-088-42/+41
* radeon/llvm: Remove the EXPORT_REG instructionTom Stellard2012-05-089-109/+6
* radeon/llvm: Use a custom inserter to lower RESERVE_REGTom Stellard2012-05-089-21/+81
* radeon/llvm: Use a custom inserter to lower STORE_OUTPUTTom Stellard2012-05-084-34/+23
* radeon/llvm: Remove AMDGPULowerShaderInstructions classTom Stellard2012-05-086-86/+4
* radeon/llvm: Use a custom inserter to lower LOAD_INPUTTom Stellard2012-05-084-39/+15
* radeon/llvm: Remove the ReorderPreloadInstructions passTom Stellard2012-05-089-100/+4
* radeon/llvm: Remove old comment from AMDIL.hTom Stellard2012-05-081-5/+0
* radeon/llvm: add suport for cube texturesVadim Girlin2012-05-081-1/+91
* radeon/llvm: add support for CUBE ALU instructionVadim Girlin2012-05-085-21/+63
* radeon/llvm: add support for some ALU instructionsVadim Girlin2012-05-084-13/+293
* radeon/llvm: add missing cases for BREAK/CONTINUEVadim Girlin2012-05-082-0/+3
* radeon/llvm: add support for AHSR/LSHR/LSHL instructionsVadim Girlin2012-05-084-0/+53
* radeon/llvm: add support for TXQ/TXF/DDX/DDY instructionsVadim Girlin2012-05-084-4/+39
* radeon/llvm: add support for VertexID, InstanceIDVadim Girlin2012-05-082-0/+16
* radeon/llvm: fix live-in handling for inputsVadim Girlin2012-05-082-2/+3
* radeon/llvm: add support for v4i32Vadim Girlin2012-05-084-5/+20
* radeon/llvm: fix ABS_i32 instruction loweringVadim Girlin2012-05-081-2/+2
* radeon/llvm: use integer comparison for IFVadim Girlin2012-05-081-2/+4
* radeon/llvm: use bitcasts for integersVadim Girlin2012-05-082-4/+70
* radeon/llvm: Remove references to DebugFlag and isCurrentDebugType()Tom Stellard2012-05-074-22/+3
* r600g/llvm: Lower ULT A, B, C to SETGT_UINT A, C, BTom Stellard2012-05-031-0/+7
* r600g/llvm: Don't duplicate R600 intrinsics installed by LLVMTom Stellard2012-05-034-0/+26
* radeon/llvm: Fix MachineInstr dumpTom Stellard2012-05-022-8/+9
* radeon/llvm: Fix build for updated LLVM 3.1 release branchTom Stellard2012-05-012-18/+18
* radeon/llvm: Add subtarget feature: DumpCodeTom Stellard2012-05-015-6/+9
* r600g/llvm: Remove unnecessary dynamic castsDragomir Ivanov2012-04-301-5/+5
* r600g/llvm: Add pattern for llvm.AMDGPU.kill v2Dragomir Ivanov2012-04-302-1/+6
* r600g/llvm: Fix handling of MASK_WRITE instructionsTom Stellard2012-04-302-1/+3
* radeon/llvm: Use a custom emit function for TGSI_OPCODE_KILTom Stellard2012-04-301-1/+16
* radeonsi/llvm: Silence a warningTom Stellard2012-04-251-0/+1
* radeon/llvm: Remove unused header filesTom Stellard2012-04-252-115/+0
* radeon/llvm: Remove AMDILMachineFunctionInfo.cppTom Stellard2012-04-2514-1176/+6
* radeon/llvm: Remove AMDILModuleInfo.cppTom Stellard2012-04-254-1432/+0
* radeon/llvm: Remove AMDILELFWriterInfo.cppTom Stellard2012-04-255-137/+1
* radeon/llvm: Remove AMDILLiteralManager.cppTom Stellard2012-04-254-129/+0
* radeon/llvm: Remove AMDILInliner.cppTom Stellard2012-04-255-276/+0
* radeon/llvm: Remove AMDILBarrierDetect.cppTom Stellard2012-04-255-259/+0