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* radeon/llvm: Cleanup R600Instructions.tdTom Stellard2012-08-242-93/+28
* radeon/llvm: Set End of Program bit on RAT instructionsTom Stellard2012-08-233-10/+14
* radeon/llvm: Use correct instruction for moving immediatesTom Stellard2012-08-231-1/+2
* radeon/llvm: Fix some coding style issuesTom Stellard2012-08-2314-82/+135
* radeon/llvm: Pull changes from external version of the backendTom Stellard2012-08-2321-76/+38
* radeon/llvm: Simplify the convert to ISA passTom Stellard2012-08-233-20/+7
* radeon/llvm: Make sure to use the Text section in the AsmPrinterTom Stellard2012-08-231-0/+2
* radeon/llvm: Use the MCCodeEmitter for R600Tom Stellard2012-08-2316-738/+779
* radeon/llvm: Use the MCCodeEmitter for SITom Stellard2012-08-2315-431/+591
* radeon/llvm: Set 64BitPtr feature bit for SITom Stellard2012-08-231-1/+1
* radeon/llvm: Lower RETFLAG DAG Node to S_ENDPGM on SITom Stellard2012-08-233-8/+12
* radeon/llvm: Add AsmPrinterTom Stellard2012-08-238-0/+193
* radeon/llvm: Mark JUMP as a pseudo instructionTom Stellard2012-08-231-1/+1
* radeon/llvm: Remove the last uses of MachineOperand flagsTom Stellard2012-08-232-8/+27
* radeon/llvm: Add flag operand to some instructionsTom Stellard2012-08-237-33/+97
* radeon/llvm: Encapsulate setting of MachineOperand flagsTom Stellard2012-08-234-50/+71
* radeon/llvm: ExpandSpecialInstrs - Add support for cube instructionsTom Stellard2012-08-214-63/+100
* radeon/llvm: ExpandSpecialInstrs - Add support for vector instructionsTom Stellard2012-08-212-15/+30
* radeon/llvm: Add R600ExpandSpecialInstrs passTom Stellard2012-08-216-14/+112
* radeon/llvm: Add helper function for getting sub reg indicesTom Stellard2012-08-213-6/+19
* radeon-llvm: Start multithreaded before using llvm.Mathias Fröhlich2012-08-201-0/+15
* radeon/llvm: Lower implicit parameters before ISelTom Stellard2012-08-163-69/+42
* radeon/llvm: Enable if-cvtVincent Lejeune2012-08-151-0/+3
* radeon/llvm: Add callbacks needed by if-cvtVincent Lejeune2012-08-152-2/+151
* radeon/llvm: Lower branch/branch_cond into predicated jumpVincent Lejeune2012-08-157-145/+278
* radeon/llvm: Add a predicated JUMP instructionVincent Lejeune2012-08-151-0/+9
* radeon/llvm: Support for predicate bitVincent Lejeune2012-08-158-13/+125
* radeon/llvm: add support to fetch temps as vectorsChristian König2012-08-151-1/+11
* radeon/llvm: Remove AMDGPUUtil.cppTom Stellard2012-08-158-81/+22
* radeon/llvm: Cleanup AMDGPUUtil.cppApostolos Bartziokas2012-08-156-119/+95
* radeon/llvm: Lower loads from USE_SGPR adddress space during DAG loweringTom Stellard2012-08-155-66/+50
* radeon/llvm: Add live-in registers during DAG loweringTom Stellard2012-08-158-64/+79
* radeon/llvm: Lower store_output intrinsic during DAG loweringTom Stellard2012-08-153-22/+22
* radeon/llvm: Force VTX_READ instructions to use same reg for src and dstTom Stellard2012-08-151-0/+14
* radeon/llvm: Inline immediate offset when lowering implicit parametersTom Stellard2012-08-141-4/+8
* radeon/llvm: Use correct opcocde for BREAK_LOGICALNZ_i32Tom Stellard2012-08-141-1/+4
* radeon/llvm: Add $(LLVM_LDFLAGS) to the loader linker flagsTom Stellard2012-08-021-1/+1
* radeon/llvm: Add support for more f32 CMP instructions on SITom Stellard2012-08-021-5/+15
* radeon/llvm: Add support for fneg on SITom Stellard2012-08-022-0/+16
* radeon/llvm: Add support for fp_to_sint on SITom Stellard2012-08-021-1/+3
* radeon/llvm: Remove CMOVLOG DAG nodeTom Stellard2012-08-026-75/+9
* radeonsi: Handle TGSI DIV opcode.Michel Dänzer2012-08-021-0/+5
* radeon/llvm: fix fp immediates on SIChristian König2012-08-021-7/+20
* radeon/llvm: fix calculation of max register numberChristian König2012-08-011-1/+1
* radeon/llvm: Add pseudo-support for 64-bit immediate types on SITom Stellard2012-07-312-0/+23
* radeon/llvm: Fix incorrect return value in SelectADDRReg()Tom Stellard2012-07-311-1/+1
* radeon/llvm: Move SMRD IMM pattern before SMRD SGPR patternTom Stellard2012-07-311-7/+6
* radeon/llvm: Cleanup AMDIL.hTom Stellard2012-07-304-91/+26
* radeon/llvm: Rename all AMDIL* classes to AMDGPU*Tom Stellard2012-07-3030-496/+496
* radeon/llvm: Merge AMDILSubtarget into AMDGPUSubtargetTom Stellard2012-07-3025-324/+156
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