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path: root/src/gallium/drivers/radeon
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* radeonsi: initialize TC_L2_dirty to false after buffer allocationMarek Olšák2015-02-171-0/+1
* r600g,radeonsi: use fences to implement PIPE_QUERY_GPU_FINISHEDMarek Olšák2015-02-171-9/+13
* r600g,radeonsi: demote TIMESTAMP_DISJOINT query to be a software queryMarek Olšák2015-02-171-14/+13
* r600g,radeonsi: don't append to streamout buffers that haven't been used yetMarek Olšák2015-02-042-1/+4
* tgsi: add tgsi_get_processor_type helper from radeonMarek Olšák2015-02-041-11/+0
* dir-locals.el: Don't set variables for non-programming modesNeil Roberts2015-02-021-1/+1
* r600g,radeonsi: Fix calculation of IR target cap string buffer sizeMichel Dänzer2015-01-271-2/+2
* radeonsi: Re-enable LLVM IR dumpsTom Stellard2015-01-201-1/+3
* radeon: Teach radeon_elf_read() how to parse reloc information v3Tom Stellard2015-01-203-5/+76
* radeon: Add a helper function for freeing members of radeon_shader_binaryTom Stellard2015-01-202-0/+11
* r600g: fix build failure when building the driver without LLVMMarek Olšák2015-01-121-0/+4
* radeonsi: use TC L2 for CP DMA operations with shader resources on CIKMarek Olšák2015-01-071-0/+12
* radeonsi: only flush the right set of caches for CP DMA operationsMarek Olšák2015-01-074-8/+14
* r600g,radeonsi: separate cache flush flagsMarek Olšák2015-01-071-22/+2
* r600g: move r6xx-specific streamout flush flagging into r600gMarek Olšák2015-01-071-6/+1
* radeonsi: use ordered compares for SSG and face selectionMarek Olšák2015-01-071-2/+2
* radeon/llvm: Use amdgcn triple for SI+ on LLVM >= 3.6Tom Stellard2015-01-063-14/+20
* radeonsi: Cache LLVMTargetMachine object in si_screenTom Stellard2015-01-062-24/+29
* radeonsi: fix warningsMarek Olšák2015-01-011-0/+2
* gallium: Remove Android files from distribution.Matt Turner2014-12-121-1/+1
* radeonsi: add emit util functions for SH registersMarek Olšák2014-12-102-1/+18
* winsys/radeon: Always report at least 1 compute unitTom Stellard2014-12-081-1/+1
* gallium: remove unused pipe_viewport_state::translate[3] and scale[3]Marek Olšák2014-11-161-2/+0
* r600g/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2Tom Stellard2014-10-312-6/+6
* gallium/radeon: Add query for symbol specific config informationTom Stellard2014-10-313-0/+86
* r600g: Delete unused variable 'max_global_size' in 'r600_get_compute_param'Dieter Nützel2014-10-301-1/+0
* radeon/llvm: Dynamically allocate branch/loop stack arraysMichel Dänzer2014-10-292-6/+37
* radeon: enable Hyper-Z on r600g and radeonsi by defaultAndreas Boll2014-10-243-3/+3
* r600g,radeonsi: convert TGSI shader type to LLVM shader typeMarek Olšák2014-10-211-1/+30
* r600g,radeonsi: Only set use_staging_texture = TRUE onceMichel Dänzer2014-10-151-8/+5
* r600g,radeonsi: Use staging texture for transfers if any miplevel is tiledMichel Dänzer2014-10-151-1/+1
* radeonsi: remove shader->input[] and output[] arrays and dependenciesMarek Olšák2014-10-121-1/+2
* r600g,radeonsi: Always use GTT again for PIPE_USAGE_STREAM buffersMichel Dänzer2014-10-091-1/+3
* radeonsi/compute: do CS partial flush with si_emit_cache_flushMarek Olšák2014-09-241-0/+1
* radeonsi/compute: flush caches with si_emit_cache_flushMarek Olšák2014-09-241-0/+3
* r600g,radeonsi: add debug option which forces DMA for copy_region and blitMarek Olšák2014-09-122-1/+3
* radeon/uvd: use PIPE_USAGE_STAGING for msg&fb buffersChristian König2014-09-111-1/+1
* radeon/video: use the hw to initial clear the buffersChristian König2014-09-113-10/+8
* radeon/video: use more of the common buffer code v2Christian König2014-09-116-67/+62
* r600g,radeonsi: Set RADEON_GEM_NO_CPU_ACCESS flag for tiled BOsMichel Dänzer2014-09-101-0/+1
* gallium/radeon: ship all files in the tarballEmil Velikov2014-09-052-7/+20
* r600g,radeonsi: make sure there's enough CS space before resuming queriesMarek Olšák2014-09-041-0/+28
* Revert "r600g,radeonsi: initialize HTILE to fully-expanded state"Marek Olšák2014-09-041-3/+1
* r600g,radeonsi: Preserve existing buffer flagsMichel Dänzer2014-09-031-3/+3
* r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPUMichel Dänzer2014-09-021-9/+14
* radeonsi: implement EXPCLEAR optimization for depthMarek Olšák2014-09-011-0/+1
* r600g,radeonsi: initialize HTILE to fully-expanded stateMarek Olšák2014-09-011-1/+3
* r600g: use HTILE allocator from SIMarek Olšák2014-09-011-41/+19
* gallium/radeon: cleanup header inclusionEmil Velikov2014-08-287-7/+7
* radeon/uvd: remove comment about RV770Alex Deucher2014-08-271-1/+0