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* gallium/radeon: handle VRAM_GTT placements as having slow CPU readsMarek Olšák2016-05-192-2/+2
| | | | | | not sure if we should include GTT WC too Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: ignore PIPE_TRANSFER_MAP_DIRECTLYMarek Olšák2016-05-191-5/+1
| | | | | | Only st/xa is using this, which is irrelevant to us. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon: Change AA sample locations for EG+Axel Davy2016-05-181-34/+34
| | | | | | | | | | | This sets the AA location to the d3d11 spec. EG/NI 8X MSAA is left as is. Not sure why it was set different to Cayman, so lets it as is. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add radeon_emitted to check for non-trivial IBsNicolai Hähnle2016-05-174-8/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use radeon_emitNicolai Hähnle2016-05-171-3/+2
| | | | | | | Mostly generated using a sed-script, with manual fix-up for multi-line statements. Reviewed-by: Marek Olšák <[email protected]>
* Treewide: Remove Elements() macroJan Vesely2016-05-174-7/+7
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium/radeon: don't flush the GFX IB if DMA doesn't depend on itMarek Olšák2016-05-101-2/+8
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: consolidate radeon_add_to_buffer_list calls for DMAMarek Olšák2016-05-101-0/+14
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add a heuristic for better (S)DMA performanceMarek Olšák2016-05-102-0/+16
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: flush if DMA IB memory usage is too highMarek Olšák2016-05-102-5/+25
| | | | | | | | This prevents IB rejections due to insane memory usage from many concecutive texture uploads. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix (S)DMA read-after-write hazardsMarek Olšák2016-05-102-0/+25
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: implement randomized SDMA texture copy testing (v2)Marek Olšák2016-05-104-0/+413
| | | | | | | | | | | v2: - adjustments for exercising all important SDMA code paths - decrease the probability of getting huge sizes (faster testing) - increase the probability of getting power-of-two dimensions - change the memory cap to 128MB (faster testing) - better detect which engine has been used Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: discard CMASK or DCC if overwriting a whole texture by DMAMarek Olšák2016-05-101-7/+39
| | | | | | | v2: simplify the conditionals Reviewed-by: Alex Deucher <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use a common function for DMA blit preparationMarek Olšák2016-05-102-0/+62
| | | | | | | this is more robust and probably fixes some bugs already Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: split out code for discarding DCCMarek Olšák2016-05-101-6/+12
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename r600_texture_disable_cmask -> discard_cmaskMarek Olšák2016-05-101-2/+2
| | | | | | | because it doesn't decompress Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix partial layered transfers of cube (array) texturesMarek Olšák2016-05-101-15/+6
| | | | | | | | | a staging cube texture with array_size % 6 != 0 doesn't work very well just use 2D_ARRAY or 2D for all staging textures Cc: 11.1 11.2 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use gart_page_size instead of hardcoded 4096Marek Olšák2016-05-102-4/+9
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: move gart_page_size to struct radeon_winsysMarek Olšák2016-05-101-0/+1
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose performance counters as 64 bitNicolai Hähnle2016-05-091-11/+11
| | | | | | | This is useful for shader-related counters, since they tend to quickly exceed 32 bits. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: clean left-shift undefined behaviorNicolai Hähnle2016-05-073-61/+61
| | | | | | | | | | | | | | Shifting into the sign bit of a signed int is undefined behavior. Unfortunately, there are potentially many places where this happens using the register macros. This commit is the result of running sed -ie "s/(((\(\w\+\)) & 0x\(\w\+\)) << \(\w\+\))/(((unsigned)(\1) \& 0x\2) << \3)/g" on all header files in gallium/{r600,radeon,radeonsi}. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove stencil_tile_split from metadataMarek Olšák2016-05-022-3/+0
| | | | | | | | this is a leftover from the days when depth-stencil buffers were allocated by the DDX Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: remove tile_mode_array_valid flagsMarek Olšák2016-05-022-4/+0
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* winsys/amdgpu: pass PIPE_CONFIG to addrlib on texture importMarek Olšák2016-05-021-0/+1
| | | | | | | This hasn't been needed, but I think we should set it. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* winsys/amdgpu: read NUM_BANKS from buffer metadataMarek Olšák2016-05-021-0/+1
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: add radeon_surf::macro_tile_indexMarek Olšák2016-05-021-0/+1
| | | | | | | for indexing cik_macrotile_mode_array Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: nuke the final pre LLVM 3.6 codepathEmil Velikov2016-05-011-7/+1
| | | | | | | | | | | Missed with commit 100796c15c3 "gallium/radeon: drop support for LLVM 3.5" v2: s/LLVN/LLVM/ in shortlog (Nicolai) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix crash in r600_set_streamout_targetsNicolai Hähnle2016-04-291-6/+7
| | | | | | | | Protect against dereferencing a gap in the targets array. This was triggered by a test in the Khronos CTS. Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add the size only once in r600_context_add_resource_sizeMarek Olšák2016-04-281-5/+3
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: drop support for LINEAR_GENERAL layoutMarek Olšák2016-04-281-1/+0
| | | | | | | Unused. All texture imports use LINEAR_ALIGNED regardless of what the DDX does. Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: rework clear_buffer flagsMarek Olšák2016-04-284-10/+17
| | | | | | | | | Changes: - don't flush DB for fast color clears - don't flush any caches for initial clears - remove the flag from si_copy_buffer, always assume shader coherency Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/radeon: remove use_reusable_pool parameter from buffer_createNicolai Hähnle2016-04-273-3/+1
| | | | | | All callers set this parameter to true. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove use_reusable_pool parameter from r600_init_resourceNicolai Hähnle2016-04-273-7/+5
| | | | | | All callers set it to true. Reviewed-by: Marek Olšák <[email protected]>
* radeon/video: always use the reusable buffer poolNicolai Hähnle2016-04-272-3/+3
| | | | | | | | | | | A semantic error was introduced in a past refactoring that caused the bind parameter to be passed into the use_reusable_pool parameter of buffer_create. Since this clearly makes no sense, and there is no clear reason why the cache _shouldn't_ be used, just use the cache always. Cc: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: use do_endian_swap in color swapping functionsOded Gabbay2016-04-261-7/+13
| | | | | | | | | For some formats we need to take "do_endian_swap" into account when configuring swapping for color buffers. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: send endian info to format translation functionsOded Gabbay2016-04-262-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because r600 GPUs can't do swap in their DB unit, we need to disable endianess swapping for textures that are handled by DB. There are four format translation functions in r600g driver: - r600_translate_texformat - r600_colorformat_endian_swap - r600_translate_colorformat - r600_translate_colorswap This patch adds a new parameters to those functions, called "do_endian_swap". When running in a big-endian machine, the calling functions will check whether the texture/color is handled by DB - "rtex->is_depth && !rtex->is_flushing_texture" - and if so, they will send FALSE through this parameter. Otherwise, they will send TRUE. The translation functions, in specific cases, will look at this parameter and configure the swapping accordingly. v4: evergreen_init_color_surface_rat() is only used by compute and don't handle DB surfaces, so just sent hard-coded FALSE to translation functions when called by it. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon: handle query buffer allocation and mapping failuresNicolai Hähnle2016-04-212-9/+33
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94984 Reviewed-by: Marek Olšák <[email protected]>
* radeon: wire end_query return value to sw/hw_endNicolai Hähnle2016-04-212-7/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: add bool return to pipe_context::end_queryNicolai Hähnle2016-04-211-1/+2
| | | | | | | | | Even when begin_query succeeds, there can still be failures in query handling. For example for radeon, additional buffers may have to be allocated when queries span multiple command buffers. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*Marek Olšák2016-04-222-12/+12
| | | | Acked-by: Jose Fonseca <[email protected]>
* gallium: merge PIPE_SWIZZLE_* and UTIL_FORMAT_SWIZZLE_*Marek Olšák2016-04-221-7/+7
| | | | | | | | Use PIPE_SWIZZLE_* everywhere. Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE. The new enum is called pipe_swizzle. Acked-by: Jose Fonseca <[email protected]>
* gallium/radeon: Silence possibly uninitialized variable warning.Bas Nieuwenhuizen2016-04-211-1/+1
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable TGSI support cap for compute shadersBas Nieuwenhuizen2016-04-191-5/+16
| | | | | | | | | | | | v2: Use chip_class instead of family. v3: Check kernel version for SI. v4: Preemptively allow amdgpu winsys for SI. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add shared memoryBas Nieuwenhuizen2016-04-192-0/+7
| | | | | | | | | | | | | | | Declares the shared memory as a global variable so that LLVM is aware of it and it does not conflict with passes like AMDGPUPromoteAlloca. v2: - Use ctx->i8. - Dropped null-check for declare_memory_region. - Changed memory region array to single region. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: Create CE IB.Bas Nieuwenhuizen2016-04-192-0/+2
| | | | | | | | | | | | | | | | | | | Based on work by Marek Olšák. v2: Add preamble IB. Leaves the load packet in the space calculation as the radeon winsys might not be able to support a premable. The added space calculation may look expensive, but is converted to a constant with (at least) -O2 and -O3. v3: - Fix code style. - Remove needed space for vertex buffer descriptors. - Fail when the preamble cannot be created. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: Add support for const IB.Marek Olšák2016-04-191-0/+30
| | | | | | v2: Use the correct IB to update request (Bas Nieuwenhuizen) v3: Add preamble IB. (Bas Nieuwenhuizen) Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: move ring_type into winsysesMarek Olšák2016-04-191-1/+0
| | | | | | Not used by drivers. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: use enums in r600_query.hMarek Olšák2016-04-181-20/+23
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't flush CB/DB caches for timestamp queriesMarek Olšák2016-04-182-2/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix Nine with its slightly shifted viewportsMarek Olšák2016-04-181-15/+21
| | | | | | | just need to do the calculation in floating-point and then round things properly Reviewed-by: Axel Davy <[email protected]>
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