summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeon
Commit message (Collapse)AuthorAgeFilesLines
* radeonsi: simplify and improve flushingMarek Olšák2013-08-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mimics r600g. The R600_CONTEXT_xxx flags are added to rctx->b.flags and si_emit_cache_flush emits the packets. That's it. The shared radeon code tells us when the streamout cache should be flushed, so we have to check the flags anyway. There is a new atom "cache_flush", because caches must be flushed *after* resource descriptors are changed in memory. Functional changes: * Write caches are flushed at the end of CS and read caches are flushed at its beginning. * Sampler view states are removed from si_state, they only held the flush flags. * Everytime a shader is changed, the I cache is flushed. Is this needed? Due to a hw bug, this also flushes the K cache. * The WRITE_DATA packet is changed to use TC, which fixes a rendering issue in openarena. I'm not sure how TC interacts with CP DMA, but for now it seems to work better than any other solution I tried. (BTW CIK allows us to use TC for CP DMA.) * Flush the K cache instead of the texture cache when updating resource descriptors (due to a hw bug, this also flushes the I cache). I think the K cache flush is correct here, but I'm not sure if the texture cache should be flushed too (probably not considering we use TC for WRITE_DATA, but we don't use TC for CP DMA). * The number of resource contexts is decreased to 16. With all of these cache changes, 4 doesn't work, but 8 works, which suggests I'm actually doing the right thing here and the pipeline isn't drained during flushes. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: use r600_common_context, r600_common_screen, r600_resourceMarek Olšák2013-08-312-1/+8
| | | | | | | | | Also r600_hw_context_priv.h and si_state_streamout.c are removed, because they are no longer needed. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* r600g: move streamout state to drivers/radeonMarek Olšák2013-08-316-0/+844
| | | | | | | | | | | | | | | | | | | | | | | | This streamout state code will be used by radeonsi. There are new structures r600_common_context and r600_common_screen. What is inherited by what is shown here: pipe_context -> r600_common_context -> r600_context pipe_screen -> r600_common_screen -> r600_screen The common structures reside in drivers/radeon. Currently they only contain enough functionality to be able to handle streamout. Eventually I'd like the whole pipe_screen implementation to be shared and some of the context stuff too. This is quite big, but most changes are because of the new structures and the fact r600_write_value is replaced by radeon_emit. Thanks to Tom Stellard for fixing the build for r600g/compute. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeon/uvd: fix MPEG2/4 ref frame index limitChristian König2013-08-291-2/+2
| | | | | | Otherwise the first few frames have an incorrect reference index. Signed-off-by: Christian König <[email protected]>
* vl: add entrypoint to is_video_format_supportedChristian König2013-08-192-2/+4
| | | | Signed-off-by: Christian König <[email protected]>
* vl: add entrypoint to get_video_paramChristian König2013-08-192-0/+2
| | | | Signed-off-by: Christian König <[email protected]>
* vl: rename pipe_video_decoder to pipe_video_codecChristian König2013-08-192-17/+17
| | | | Signed-off-by: Christian König <[email protected]>
* vl: rename enum pipe_video_codec to pipe_video_formatChristian König2013-08-191-19/+19
| | | | Signed-off-by: Christian König <[email protected]>
* vl: use a template for create_video_decoderChristian König2013-08-192-28/+13
| | | | Signed-off-by: Christian König <[email protected]>
* r600/radeonsi: implement new float comparison instructionsRoland Scheidegger2013-08-151-9/+40
| | | | | | | Also use ordered comparisons for old cmp instructions. Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* vl: Add support for max level query v2Rico Schüller2013-08-141-0/+24
| | | | | | | | | This patch adds the level query support to the video decoders and uses some more reasonable defaults. v2: (ck) add commit message Reviewed-by: Christian König <[email protected]>
* radeon/llvm: Add missing "%s" format string to fprintf.Jon Severinsson2013-08-131-1/+1
| | | | | | | | This fixes a compilation warning with -Wformat-security. CC: "9.2" <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* tgsi: rename the TGSI fragment kill opcodesBrian Paul2013-07-121-4/+4
| | | | | | | | | | | | | | | | | | | | | TGSI_OPCODE_KIL and KILP had confusing names. The former was conditional kill (if any src component < 0). The later was unconditional kill. At one time KILP was supposed to work with NV-style condition codes/predicates but we never had that in TGSI. This patch renames both opcodes: TGSI_OPCODE_KIL -> KILL_IF (kill if src.xyzw < 0) TGSI_OPCODE_KILP -> KILL (unconditional kill) Note: I didn't just transpose the opcode names to help ensure that I didn't miss updating any code anywhere. I believe I've updated all the relevant code and comments but I'm not 100% sure that some drivers had this right in the first place. For example, the radeon driver might have llvm.AMDGPU.kill and llvm.AMDGPU.kilp mixed up. Driver authors should review their code. Reviewed-by: Jose Fonseca <[email protected]>
* radeon/uvd: fall back to shader based decoding for MPEG2 on UVD 2.x v2Christian König2013-07-121-1/+4
| | | | | | | | | | | UVD 2.x doesn't support hardware decoding of MPEG2, just use shader based decoding for those chipsets. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66450 v2: fix interlacing as well Signed-off-by: Christian König <[email protected]>
* radeonsi: Handle TGSI TXQ opcodeMichel Dänzer2013-05-281-1/+1
|
* radeonsi: Add support for TGSI TXF opcodeMichel Dänzer2013-05-281-1/+1
|
* radeon: Initialize variables in radeon_llvm_context_init.Vinson Lee2013-05-221-0/+2
| | | | | | | | | | | 'type' was not fully initialized when calling lp_build_context_init. Fixes "Uninitialized scalar variable" defect reported by Coverity. NOTE: This is a candidate for the stable branches. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g/llvm: fix cubemap lod/biasVincent Lejeune2013-05-201-0/+3
|
* r600g/llvm: Fix cubearray textureSizeVincent Lejeune2013-05-201-0/+1
|
* radeon/llvm: Run standard optimization passes on conpute shader modulesTom Stellard2013-05-171-0/+15
| | | | | | The SROA and function inliner passes are espically important, because they optimize away unsupported features: functions and indirect private memory access.
* r600g/llvm: Parse config values in register / value pairsTom Stellard2013-05-061-1/+1
| | | | Rather than relying on a predetermined order for the config values.
* r600g/llvm: Don't feed LLVM output through r600_bytecode_build()Tom Stellard2013-05-061-1/+1
| | | | | The LLVM backend emits raw ISA now, so we can just its output unmodified.
* r600g/llvm: Don't emit CALL_FS for vertex shadersTom Stellard2013-05-061-1/+1
| | | | The LLVM backend takes care of this now.
* radeon/llvm: Always build libradeonllvm as staticTom Stellard2013-05-061-15/+8
| | | | | | | | | This library is very small, so there is not much to gain from building it as a shared library. Also, when linking statically with LLVM, a shared libradeonllvm exports LLVM symbols and creates problems when used with other shared objects that also link statically to LLVM. Reviewed-by: [email protected]
* radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA v2Tom Stellard2013-05-065-203/+173
| | | | | | | | | | | The LLVM C API is considered stable and should never change, so it is much more desirable to use than the LLVM C++ API, which is constantly in flux. v2: - Split target initialization and lookup into separate functions Reviewed-by: [email protected]
* gallivm: Move LLVMStartMultithreaded() static initializer into gallivmTom Stellard2013-05-061-14/+0
| | | | | | | This does not solve all of the problems with using LLVM in a multithreaded enivronment, but it should help in some cases. Reviewed-by: [email protected]
* radeon/llvm: Don't use the global context when parsing LLVM IRTom Stellard2013-05-061-2/+3
| | | | | | | This leads to crashes when multiple threads try to compile compute shaders in the same time. Fixes a crash in bfgminer when using more than one thread.
* r600g/llvm: Update radeon family mappings for LLVM backendTom Stellard2013-05-061-1/+1
| | | | | New processors were added to the backend to distinguish between GPUs with and without vertex caches.
* radeon/uvd: enable interlaced buffers by defaultChristian König2013-05-031-2/+2
| | | | | | Kills tilling on UVD buffers, but we currently don't really need that. Signed-off-by: Christian König <[email protected]>
* radeon/uvd: fix some MPEG4 artifactsChristian König2013-05-031-7/+17
| | | | | | Still not perfect, but a step in the right direction. Signed-off-by: Christian König <[email protected]>
* radeon: Fix build with LLVM 3.3Armin K2013-05-021-1/+1
| | | | Reviewed-by: Tom Stellard <[email protected]>
* radeon/uvd: Fix build failure with non-standard libdrm installation prefixLauri Kasanen2013-05-021-1/+1
| | | | | | | | | | Without this patch, radeon_uvd failed to find the libdrm includes: In file included from radeon_uvd.c:48: ../../winsys/radeon/drm/radeon_winsys.h:44:35: error: libdrm/radeon_surface.h: No such file or directory Signed-off-by: Lauri Kasanen <[email protected]>
* radeon/uvd: fix quant scan order for mpeg2Christian König2013-05-011-2/+6
| | | | Signed-off-by: Christian König <[email protected]>
* r600g/llvm: get use_kill from compiler shaderVincent Lejeune2013-04-301-1/+1
|
* r600/uvd: stop advertising MPEG4 on UVD 2.x chips v2Christian König2013-04-261-1/+0
| | | | | | | | | That is just not supported by the hardware. v2: fix compare Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/uvd: stop using anonymous unionsChristian König2013-04-262-36/+36
| | | | Signed-off-by: Christian König <[email protected]>
* winsys/radeon: consolidate tracing into winsys v2Jerome Glisse2013-04-251-2/+2
| | | | | | | | | | | | This move the tracing timeout and printing into winsys and add an debug environement variable for it (R600_DEBUG=trace_cs). Lot of file touched because of winsys API changes. v2: Do not write lockup file if ib uniq id does not match last one Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/llvm: Fix segfault with a specifc libelf implementationTom Stellard2013-04-241-0/+4
| | | | | | | | The libelf implementation that is distributed here: http://www.mr511.de/software/english.html requires calling elf_version() prior to calling elf_memory() Tested-by: Michel Dänzer <[email protected]>
* r600/llvm: Read stacksize from config headerVincent Lejeune2013-04-231-1/+1
|
* /bin/bash: q : commande introuvableVincent Lejeune2013-04-231-1/+1
|
* radeon/llvm: Fix build with LLVM >= r180063Tom Stellard2013-04-231-0/+1
|
* r600g/llvm: Use gprcount from llvmVincent Lejeune2013-04-171-1/+1
|
* gallium: Disambiguate TGSI_OPCODE_IF.José Fonseca2013-04-171-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TGSI_OPCODE_IF condition had two possible interpretations: - src.x != 0.0f - Mesa statetracker when PIPE_SHADER_CAP_INTEGERS was false either for vertex and fragment shaders - gallivm/llvmpipe - postprocess - vl state tracker - vega state tracker - most old drivers - old internal state trackers - many graw examples - src.x != 0U - Mesa statetracker when PIPE_SHADER_CAP_INTEGERS was true for both vertex and fragment shaders - tgsi_exec/softpipe - r600 - radeonsi - nv50 And drivers that use draw module also were a mess (because Mesa would emit float IFs, but draw module supports native integers so it would interpret IF arg as integers...) This sort of works if the source argument is limited to float +0.0f or +1.0f, integer 0, but would fail if source is float -0.0f, or integer in the float NaN range. It could also fail if source is integer 1, and hardware flushes denormalized numbers to zero. But with this change there are now two opcodes, IF and UIF, with clear meaning. Drivers that do not support native integers do not need to worry about UIF. However, for backwards compatibility with old state trackers and examples, it is advisable that native integer capable drivers also support the float IF opcode. I tried to implement this for r600 and radeonsi based on the surrounding code. I couldn't do this for nouveau, so I just shunted IF/UIF together, which matches the current behavior. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]> v2: - Incorporate Roland's feedback. - Fix r600_shader.c merge conflict. - Fix typo in radeon, spotted by Michel Dänzer. - Incorporte Christoph Bumiller's patch to handle TGSI_OPCODE_IF(float) properly in nv50/ir.
* radeonsi: Read config values from the .AMDGPU.config ELF sectionTom Stellard2013-04-151-1/+1
| | | | | | | | | Instead of emitting configuration values (e.g. number of gprs used) in a predefined order, the LLVM backend now emits these values in register/value pairs. The first dword contains the register address and the second dword contians the value to write. Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Handle ELF formatted binary output from the LLVM backendTom Stellard2013-04-153-6/+37
|
* radeon/llvm: Use a struct for storing compiled codeTom Stellard2013-04-152-8/+15
|
* radeon/uvd: add UVD implementation v5Christian König2013-04-114-8/+1510
| | | | | | | | | | | | | | Just everything you need for UVD with r600g and radeonsi. v2: move UVD code to radeon subdir, clean up build system additions, remove an unused SI function, disable tiling on SI for now. v3: some minor indentation fix and rebased v4: dpb size calculation fixed v5: implement proper fall-back in case the kernel doesn't support UVD, based on patches from Andreas Boll but cleaned up a bit more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: remove sampler writemask v3Christian König2013-04-101-1/+1
| | | | | | | | v2: fix instrinsic name as well v3: LLVM revision incremented as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g/llvm: Add support for native isa for pre EGVincent Lejeune2013-04-081-1/+1
| | | | | This fixes bug 62756 : https://bugs.freedesktop.org/show_bug.cgi?id=62756#c12
* radeonsi: Add compute support v3Tom Stellard2013-04-052-1/+3
| | | | | | | | | | | v2: - Only dump shaders when env variable is set. v3: - Don't emit VGT registers Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 22:44:44 +0000