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path: root/src/gallium/drivers/radeon/radeon_vcn_dec.c
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* radeon: switch to 3-spaces stylePierre-Eric Pelloux-Prayer2020-03-301-1409/+1369
| | | | | | | | For clang-format config see the previous commit. Reviewed-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
* radeon: Use P010 for decoding of 10-bit videosThong Thai2020-01-031-2/+4
| | | | | | | | | | | Previously, P016 was used for the decoding of 10-bit HEVC/H.265 encoded videos, which worked fine for mpv and ffmpeg. GStreamer specifically looks for P010, so this patch sets the default buffer type to P010 for HEVC decoding. Signed-off-by: Thong Thai <[email protected]> Reviewed-by: Leo Liu <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
* radeon/vcn: Add VP9 8K decode supportLeo Liu2019-10-301-1/+1
| | | | | | | Require increase of context buffer size Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeon: Fix mjpeg issue for ARCTURUSZhu, James2019-09-061-0/+1
| | | | | | | ARCTURUS mjpeg is using direct register access. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeon/vcn: add RENOIR VCN decode supportLeo Liu2019-09-061-4/+4
| | | | | | | It has same VCN2.x block as Navi1x Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeon/vcn/vp9: add Arcturus VP9 supportLeo Liu2019-07-291-3/+3
| | | | | | | | Arcturus CHIP enum is less than Navi10, since it's still gfx9, but its VCN version belongs to VCN2.x Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeon/vcn: add Arcturus decode supportLeo Liu2019-07-291-1/+11
| | | | | | | different internal registers offset from previous HW Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeon/vcn: add direct register boolBoyuan Zhang2019-07-031-0/+2
| | | | | | | VCN 2.0 uses direct register space where VCN 1.0 uses some indirect registers Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]>
* radeon/vcn: add VP9 support for Navi10Leo Liu2019-07-031-10/+20
| | | | | | | It requires bigger DPB and context buffers Signed-off-by: Leo Liu <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]>
* radeon/vcn: add VCN2 set of internal registers for IBLeo Liu2019-07-031-9/+25
| | | | | | | | From VCN2.0, the RBC have different views on the registers Signed-off-by: Leo Liu <[email protected]> (v2: rebase -- Nicolai) Acked-by: Bas Nieuwenhuizen <[email protected]>
* radeon/uvd: fix calc_ctx_size_h265_main10Pierre-Eric Pelloux-Prayer2019-06-281-3/+3
| | | | | | | | | | | Left shift was applied twice. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110702 Reviewed-by: Leo Liu <[email protected]> Tested-by: <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Cc: <[email protected]>
* radeon/vcn/vp9: search the render target from the whole listLeo Liu2019-04-011-1/+1
| | | | | | | | | | | | | The number of render targets could be more than max of references, so we search the full list of the render pictures for the current render target index https://bugs.freedesktop.org/show_bug.cgi?id=109648 Signed-off-by: Leo Liu <[email protected]> Tested-by: James Zhu <[email protected]> Acked-by: James Zhu<[email protected]> Cc: <[email protected]>
* radeon/vcn: add H.264 constrained baseline supportLeo Liu2019-03-271-0/+1
| | | | | | | | VCN supports this profile as well as UVD, so add it Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> CC: <[email protected]>
* radeonsi: rename r600_resource -> si_resourceMarek Olšák2019-01-221-2/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: explicitly declare whether buffer_map is permanent or notNicolai Hähnle2018-11-281-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new driver-private transfer flag RADEON_TRANSFER_TEMPORARY that specifies whether the caller will use buffer_unmap or not. The default behavior is set to permanent maps, because that's what drivers do for Gallium buffer maps. This should eliminate the need for hacks in libdrm. Assertions are added to catch when the buffer_unmap calls don't match the (temporary) buffer_map calls. I did my best to update r600 for consistency (r300 needs no changes because it never calls buffer_unmap), even though the radeon winsys ignores the new flag. As an added bonus, this should actually improve the performance of the normal fast path, because we no longer call into libdrm at all after the first map, and there's one less atomic in the winsys itself (there are now no atomics left in the UNSYNCHRONIZED fast path). Cc: Leo Liu <[email protected]> v2: - remove comment about visible VRAM (Marek) - don't rely on amdgpu_bo_cpu_map doing an atomic write Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET onlyMarek Olšák2018-11-091-1/+1
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeon/vcn: add jpeg decode implementationBoyuan Zhang2018-10-231-7/+14
| | | | | | | | Add a new file to handle VCN Jpeg decode specific functions. Use Jpeg specific cmd sending function in end_frame call. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/vcn: separate send cmd call from end frameBoyuan Zhang2018-10-231-8/+21
| | | | | | | | Use function pointer for sending cmd in end_frame call. By doing this, we can assign different cmd sending logics for Jpeg decode later. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/vcn: create cs based on ring typeBoyuan Zhang2018-10-231-2/+6
| | | | | | | Add RING_VCN_JPEG for VCN Jpeg decode, and keep RING_VCN_DEC for other codecs. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/vcn: move radeon decoder define to header fileBoyuan Zhang2018-10-231-31/+0
| | | | | | | | Move radeon_decoder definition from "radeon_vcn_dec.c" to "radeon_vcn_dec.h", so that it can be included by other files later. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeonsi: remove non-GFX BO priority flagsMarek Olšák2018-07-161-1/+1
| | | | | | For a later simplification. Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: rename r600_texture -> si_texture, rxxx -> xxx or sxxxMarek Olšák2018-06-191-4/+4
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák2018-06-191-1/+1
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: rename r600_texture::resource to bufferMarek Olšák2018-04-271-1/+1
| | | | | | r600_resource could be renamed to si_buffer. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use r600_resource() typecast helperMarek Olšák2018-04-271-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/vcn: fix mpeg4 msg buffer settingsBoyuan Zhang2018-04-261-9/+9
| | | | | | | | Previous bit-fields assignments are incorrect and will result certain mpeg4 decode failed due to wrong flag values. This patch fixes these assignments. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/vcn: add VP9 profile2 supportLeo Liu2018-04-121-0/+16
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add VP9 context bufferLeo Liu2018-04-121-0/+26
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: get VP9 msg bufferLeo Liu2018-04-121-1/+175
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: fill probability table to prob buffersLeo Liu2018-04-121-0/+38
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add VP9 prob table bufferLeo Liu2018-04-121-18/+34
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add VP9 dpb buffer sizeLeo Liu2018-04-121-0/+6
| | | | | | | | | The current FW has restricted the size to the worse case, and the new dynamic dpb buffer support is on the way from firmware side, we will change accordingly. Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add VP9 stream type for decoderLeo Liu2018-04-121-0/+3
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeonsi: remove r600_common_contextMarek Olšák2018-04-051-2/+2
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt7Marek Olšák2018-04-051-3/+3
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeon: remove unneeded semicolonsGrazvydas Ignotas2018-01-171-3/+3
| | | | | | Trivial. Found by Coccinelle. Reviewed-by: Eric Engestrom <[email protected]>
* radeon/vcn: update quantiser matrices only when requestedIndrajit Das2018-01-161-6/+11
| | | | | | | Only update them when the pointers are valid. Signed-off-by: Indrajit Das <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add and manage render picture listBoyuan Zhang2017-12-151-4/+24
| | | | | | | | | | | | | | | | Create a list in decoder to store all render picture buffer pointers that currently being used in reference picture lists. During get message buffer call, check each pointer in render_pic_list[] within given pic->ref[] list, remove pointer that no longer being used by pic->ref[]. Then add current render surface pointer to the render_pic_list[] and assign the associated index to result.curr_idx. As a result, result.curr_idx will have the correct index to represent the current render picture, instead of the previous increamenting values. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* r300,r600,radeonsi: replace RADEON_FLUSH_* with PIPE_FLUSH_*Marek Olšák2017-11-291-1/+1
| | | | | | and handle PIPE_FLUSH_HINT_FINISH in r300. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_common_screenMarek Olšák2017-11-291-2/+2
| | | | | | | | | | Most files in gallium/radeon now include si_pipe.h. chip_class and family are now here: sscreen->info.family sscreen->info.chip_class Reviewed-by: Nicolai Hähnle <[email protected]>
* r600: fork and import gallium/radeonMarek Olšák2017-09-261-28/+28
| | | | | | | | | | | This marks the end of code sharing between r600 and radeonsi. It's getting difficult to work on radeonsi without breaking r600. A lot of functions had to be renamed to prevent linker conflicts. There are also minor cleanups. Acked-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/vcn: enable P016 mode supportLeo Liu2017-08-221-7/+11
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: correct target buffer pitch calculationLeo Liu2017-08-221-1/+1
| | | | | | | since the way should be as same as UVD Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: move message buffer to vram for nowLeo Liu2017-07-251-1/+2
| | | | | | | To workaround an unknown bug. Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: enable h264 decode entension supportLeo Liu2017-06-271-0/+1
| | | | | | | It's enabled through message buffer for UVD Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add decode message for mpeg4 codecLeo Liu2017-05-251-0/+51
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for mpeg2 codecLeo Liu2017-05-251-0/+66
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for vc1 codecLeo Liu2017-05-251-0/+72
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for hevc codecLeo Liu2017-05-251-0/+225
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message decode for avc codecLeo Liu2017-05-251-4/+193
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
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