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path: root/src/gallium/drivers/radeon/r600_texture.c
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* radeonsi: mark fast-cleared textures as compressed when dirtyingNicolai Hähnle2017-05-081-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | There are a bunch of piglit fast clear tests that regressed on SI, for example ./bin/ext_framebuffer_multisample-fast-clear single-sample. The problem is that a texture is bound as a framebuffer, cleared, and then rendered from in a loop that loops through different clear colors. The texture is never rebound during all this, so the change to tex->dirty_level_mask during fast clear was not taken into account when checking for compressed textures. I have considered simply reverting the problematic commit. However, I think this solution is better. It does require looping through all bound textures after a fast clear, but the alternative would require visiting more textures needless on every draw. Draws are much more common than clears. Note that the rendering feedback loop rules do not apply here, because the framebuffer binding is changed between the glClear and the draw that samples from the texture that was cleared. Fixes: bdd644976952 ("radeonsi: don't mark non-dirty textures with CMASK as compressed") Cc: 17.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx9: allow CMASK fast clear with RB+Marek Olšák2017-03-311-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix and enable single-sample CMASK fast clearMarek Olšák2017-03-311-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix linear mipmap CPU accessMarek Olšák2017-03-311-5/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: decompress DCC in set_framebuffer_state instead of create_surface (v2)Marek Olšák2017-03-311-6/+16
| | | | | | | | for threaded gallium, which can't use pipe_context in create_surface v2: don't add a new decompress helper function Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix an unused-variable warning in a release buildMarek Olšák2017-03-301-3/+1
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* gallium/radeon: s/dcc_disable/disable_dcc/Marek Olšák2017-03-301-2/+2
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium/radeon: add and use a new helper vi_dcc_enabledMarek Olšák2017-03-301-6/+5
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi/gfx9: disable features that don't workMarek Olšák2017-03-301-1/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add linear address computations for texture transfersMarek Olšák2017-03-301-20/+53
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: handle pitch and offset overrides for texture_from_handleMarek Olšák2017-03-301-11/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set/validate GFX9 BO metadataMarek Olšák2017-03-301-1/+19
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add radeon_surf.gfx9.surf_offsetMarek Olšák2017-03-301-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blitsMarek Olšák2017-03-301-1/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: do DCC clears on non-mipmapped textures onlyMarek Olšák2017-03-301-4/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update can_sample_z/s flagsMarek Olšák2017-03-301-2/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: pass correct parameters to buffer_get_handleMarek Olšák2017-03-301-6/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update si_set_optimal_micro_tile_modeMarek Olšák2017-03-301-6/+38
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't check array_mode for allowing TC-compatible HTILEMarek Olšák2017-03-301-1/+2
| | | | | | GFX9 supports this with all modes except linear. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update HTILE/CMASK/FMASK allocatorsMarek Olšák2017-03-301-1/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update r600_print_texture_infoMarek Olšák2017-03-301-2/+61
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move pre-GFX9 radeon_bo_metadata.* to u.legacy.*Marek Olšák2017-03-301-28/+36
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move pre-GFX9 radeon_surf.* members to radeon_surf.u.legacy.*Marek Olšák2017-03-301-78/+78
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: allow Z16_UNORM for TC-compatible HTILEMarek Olšák2017-03-301-6/+16
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: disable RB+ on Vega10Marek Olšák2017-03-301-6/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: reference pipe_resource in pipe_transferMarek Olšák2017-03-171-1/+2
| | | | | | for threaded gallium Reviewed-by: Timothy Arceri <[email protected]>
* gallium/util: replace pipe_mutex_unlock() with mtx_unlock()Timothy Arceri2017-03-071-2/+2
| | | | | | | | | | pipe_mutex_unlock() was made unnecessary with fd33a6bcd7f12. Replaced using: find ./src -type f -exec sed -i -- \ 's:pipe_mutex_unlock(\([^)]*\)):mtx_unlock(\&\1):g' {} \; Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: replace pipe_mutex_lock() with mtx_lock()Timothy Arceri2017-03-071-2/+2
| | | | | | | | | | replace pipe_mutex_lock() was made unnecessary with fd33a6bcd7f12. Replaced using: find ./src -type f -exec sed -i -- \ 's:pipe_mutex_lock(\([^)]*\)):mtx_lock(\&\1):g' {} \; Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use R600_RESOURCE_FLAG_UNMAPPABLE where it's desirableMarek Olšák2017-02-181-3/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add an assertion to texture_transfer_map for app bugsMarek Olšák2017-02-141-0/+1
| | | | | Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Kai Wasserbäch <[email protected]>
* gallium/radeon: use staging for texture read mappings from GTT WCMarek Olšák2017-02-101-4/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: merge dirty_fb_counter and dirty_tex_descriptor_counterMarek Olšák2017-01-301-13/+5
| | | | | | to simplify things in draw_vbo a little Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: adjust the rule for using the LINEAR_ALIGNED layoutMarek Olšák2017-01-231-1/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VIMarek Olšák2017-01-051-3/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add RADEON_SURF_OPTIMIZE_FOR_SPACEMarek Olšák2016-11-211-0/+2
| | | | | | | | FORCE_TILING should disable it. It has no effect now, but that may change soon. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix r600_texture::tc_compatible_htileMarek Olšák2016-11-101-3/+3
| | | | | | | | htile_size is now always non-zero if HTILE is allocated. It seems to have caused no issues. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add enum radeon_micro_modeMarek Olšák2016-11-011-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-onlyMarek Olšák2016-11-011-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_surface::level_infoMarek Olšák2016-11-011-2/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add radeon_surf::is_linearMarek Olšák2016-11-011-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove radeon_surf_level::pitch_bytesMarek Olšák2016-11-011-13/+16
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't call u_format helpers if we have that info alreadyMarek Olšák2016-11-011-8/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levelsMarek Olšák2016-11-011-7/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using PIPE_BIND_CUSTOMMarek Olšák2016-10-261-2/+1
| | | | | | it has no effect whatsoever Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unused r600_cmask_info membersMarek Olšák2016-10-261-12/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't force the same tiling parameters for FMASKMarek Olšák2016-10-261-8/+10
| | | | | | | | | GCN can use a completely different tile mode for FMASK. FMASK allocation now skips one unrelated amdgpu_surface_init codepath as hinted by the assertion. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: print tiling index when printing texture infoMarek Olšák2016-10-261-4/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignmentMarek Olšák2016-10-261-5/+5
| | | | | | these names were misleading. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove flags specific to libdrm_radeon from winsys interfaceMarek Olšák2016-10-261-12/+2
| | | | | | | These just say whether libdrm can assume that the latest radeon_surface definition is used by Mesa. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_htile_infoMarek Olšák2016-10-261-28/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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