| Commit message (Expand) | Author | Age | Files | Lines |
* | r600,compute: force tiling on 2D and 3D texture compute resources | Zoltan Gilian | 2015-08-03 | 1 | -2/+9 |
* | gallium/radeon: remove buffer_unmap calls that can potentially decrease perf | Marek Olšák | 2015-07-23 | 1 | -9/+0 |
* | winsys/radeon: add a private interface for radeon_surface | Marek Olšák | 2015-04-29 | 1 | -6/+6 |
* | radeonsi: only flush the right set of caches for CP DMA operations | Marek Olšák | 2015-01-07 | 1 | -3/+5 |
* | radeon: enable Hyper-Z on r600g and radeonsi by default | Andreas Boll | 2014-10-24 | 1 | -1/+1 |
* | r600g,radeonsi: Only set use_staging_texture = TRUE once | Michel Dänzer | 2014-10-15 | 1 | -8/+5 |
* | r600g,radeonsi: Use staging texture for transfers if any miplevel is tiled | Michel Dänzer | 2014-10-15 | 1 | -1/+1 |
* | Revert "r600g,radeonsi: initialize HTILE to fully-expanded state" | Marek Olšák | 2014-09-04 | 1 | -3/+1 |
* | r600g,radeonsi: initialize HTILE to fully-expanded state | Marek Olšák | 2014-09-01 | 1 | -1/+3 |
* | r600g: use HTILE allocator from SI | Marek Olšák | 2014-09-01 | 1 | -41/+19 |
* | radeonsi: fix CMASK and HTILE allocation on Tahiti | Marek Olšák | 2014-08-09 | 1 | -2/+2 |
* | gallium/radeon: use gpu_address from r600_resource | Marek Olšák | 2014-08-09 | 1 | -7/+5 |
* | gallium/radeon: store VM address in r600_resource | Marek Olšák | 2014-08-09 | 1 | -0/+1 |
* | r600g,radeonsi: switch all occurences of array_size to util_max_layer | Marek Olšák | 2014-07-28 | 1 | -3/+6 |
* | radeonsi: fix CMASK and HTILE calculations for Hawaii | Marek Olšák | 2014-07-28 | 1 | -2/+2 |
* | r600g,radeonsi: add debug flags which disable tiling | Marek Olšák | 2014-07-28 | 1 | -1/+9 |
* | r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT | Michel Dänzer | 2014-07-23 | 1 | -0/+2 |
* | gallium/radeon: use PRIX64 instead of PRIu64 | Christian König | 2014-07-06 | 1 | -1/+1 |
* | radeonsi: add sampling of 4:2:2 subsampled textures | Grigori Goronzy | 2014-06-18 | 1 | -3/+2 |
* | r600g,radeonsi: disable fast clear if render condition is on | Marek Olšák | 2014-06-03 | 1 | -0/+3 |
* | r600g: fix for HTILE on R6xx | Marek Olšák | 2014-04-25 | 1 | -0/+6 |
* | r600g: fix MSAA resolve on R6xx when the destination is 1D-tiled | Marek Olšák | 2014-04-25 | 1 | -0/+6 |
* | r600g/radeonsi: Map transfer staging texture unsynchronized when possible | Michel Dänzer | 2014-04-16 | 1 | -0/+2 |
* | r600g/radeonsi: Use caching buffer manager for textures as well | Michel Dänzer | 2014-04-15 | 1 | -1/+1 |
* | radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIK | Marek Olšák | 2014-04-09 | 1 | -5/+5 |
* | r600g,radeonsi: set correct initial domain for shared resources | Marek Olšák | 2014-04-09 | 1 | -1/+1 |
* | Revert "radeon: just don't map VRAM buffers at all" | Leo Liu | 2014-04-04 | 1 | -2/+2 |
* | radeonsi: disable fast color clear for 1D-tiled surfaces on CIK | Marek Olšák | 2014-03-22 | 1 | -0/+6 |
* | r600g,radeonsi: use a fallback in dma_copy instead of failing | Marek Olšák | 2014-03-11 | 1 | -13/+5 |
* | radeonsi: implement fast color clear | Marek Olšák | 2014-03-11 | 1 | -1/+5 |
* | r600g: move fast color clear code to a common place | Marek Olšák | 2014-03-11 | 1 | -2/+81 |
* | r600g,radeonsi: move CMASK register values from r600_surface to r600_texture | Marek Olšák | 2014-03-11 | 1 | -2/+25 |
* | radeonsi: move translate_colorswap to common code | Marek Olšák | 2014-03-04 | 1 | -0/+54 |
* | r600g,radeonsi: consolidate create_surface and surface_destroy | Marek Olšák | 2014-02-25 | 1 | -1/+51 |
* | radeon: reverse DBG_NO_HYPERZ logic | Alex Deucher | 2014-02-13 | 1 | -1/+1 |
* | gallium: remove PIPE_USAGE_STATIC | Marek Olšák | 2014-02-06 | 1 | -4/+4 |
* | r600g,radeonsi: set resource domains in one place (v2) | Marek Olšák | 2014-02-06 | 1 | -5/+2 |
* | radeon: just don't map VRAM buffers at all | Christian König | 2014-02-06 | 1 | -2/+2 |
* | r600g,radeonsi: consolidate the contents of r600_resource.c | Marek Olšák | 2014-01-28 | 1 | -6/+12 |
* | radeonsi: disable HTILE for 1D-tiled depth-stencil buffers | Marek Olšák | 2014-01-06 | 1 | -0/+5 |
* | radeon: Allocate htile buffer for SI in r600_texture. | Andreas Hartmetz | 2013-12-12 | 1 | -15/+67 |
* | radeon: rearrange r600_texture and related code a bit. | Andreas Hartmetz | 2013-12-12 | 1 | -29/+29 |
* | winsys/radeon: set/get the scanout flag with the tiling ioctls | Marek Olšák | 2013-12-12 | 1 | -4/+5 |
* | gallium/radeon: use PRIu64 macro for printing uint64_t | Emil Velikov | 2013-12-03 | 1 | -3/+4 |
* | radeonsi: implement MSAA for CIK | Marek Olšák | 2013-11-23 | 1 | -3/+7 |
* | radeonsi: enable 2D tiling on CIK | Marek Olšák | 2013-11-23 | 1 | -4/+0 |
* | radeon: use staging for mapping linear textures | Grigori Goronzy | 2013-10-13 | 1 | -0/+6 |
* | r600g: fix ínitialization of non_disp_tiling flag | Marek Olšák | 2013-10-03 | 1 | -4/+5 |
* | radeon: make texture logging more useful | Marek Olšák | 2013-09-29 | 1 | -17/+16 |
* | r600g,radeonsi: share r600_texture.c | Marek Olšák | 2013-09-29 | 1 | -0/+1015 |