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path: root/src/gallium/drivers/radeon/r600_texture.c
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* radeonsi: Enable DCC.Bas Nieuwenhuizen2015-10-241-0/+2
* radeonsi: Disable operations that do not work with DCC.Bas Nieuwenhuizen2015-10-241-0/+5
* radeonsi: Allocate buffers for DCC.Bas Nieuwenhuizen2015-10-241-0/+18
* gallium/radeon: add a fail path for depth MSAA texture readbackMarek Olšák2015-09-241-0/+5
* gallium/radeon: handle PIPE_TRANSFER_FLUSH_EXPLICITMarek Olšák2015-09-101-1/+1
* radeonsi: avoid redundant CB and DB register updatesMarek Olšák2015-09-011-1/+3
* radeonsi: fix DRM version checks for amdgpu DRM 3.0.0Marek Olšák2015-08-141-3/+5
* winsys/amdgpu: add addrlib - texture addressing and alignment calculatorMarek Olšák2015-08-141-1/+2
* gallium/radeon: use helper functions to mark atoms dirtyGrazvydas Ignotas2015-08-111-1/+1
* gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interfaceMarek Olšák2015-08-071-1/+1
* r600,compute: force tiling on 2D and 3D texture compute resourcesZoltan Gilian2015-08-031-2/+9
* gallium/radeon: remove buffer_unmap calls that can potentially decrease perfMarek Olšák2015-07-231-9/+0
* winsys/radeon: add a private interface for radeon_surfaceMarek Olšák2015-04-291-6/+6
* radeonsi: only flush the right set of caches for CP DMA operationsMarek Olšák2015-01-071-3/+5
* radeon: enable Hyper-Z on r600g and radeonsi by defaultAndreas Boll2014-10-241-1/+1
* r600g,radeonsi: Only set use_staging_texture = TRUE onceMichel Dänzer2014-10-151-8/+5
* r600g,radeonsi: Use staging texture for transfers if any miplevel is tiledMichel Dänzer2014-10-151-1/+1
* Revert "r600g,radeonsi: initialize HTILE to fully-expanded state"Marek Olšák2014-09-041-3/+1
* r600g,radeonsi: initialize HTILE to fully-expanded stateMarek Olšák2014-09-011-1/+3
* r600g: use HTILE allocator from SIMarek Olšák2014-09-011-41/+19
* radeonsi: fix CMASK and HTILE allocation on TahitiMarek Olšák2014-08-091-2/+2
* gallium/radeon: use gpu_address from r600_resourceMarek Olšák2014-08-091-7/+5
* gallium/radeon: store VM address in r600_resourceMarek Olšák2014-08-091-0/+1
* r600g,radeonsi: switch all occurences of array_size to util_max_layerMarek Olšák2014-07-281-3/+6
* radeonsi: fix CMASK and HTILE calculations for HawaiiMarek Olšák2014-07-281-2/+2
* r600g,radeonsi: add debug flags which disable tilingMarek Olšák2014-07-281-1/+9
* r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTTMichel Dänzer2014-07-231-0/+2
* gallium/radeon: use PRIX64 instead of PRIu64Christian König2014-07-061-1/+1
* radeonsi: add sampling of 4:2:2 subsampled texturesGrigori Goronzy2014-06-181-3/+2
* r600g,radeonsi: disable fast clear if render condition is onMarek Olšák2014-06-031-0/+3
* r600g: fix for HTILE on R6xxMarek Olšák2014-04-251-0/+6
* r600g: fix MSAA resolve on R6xx when the destination is 1D-tiledMarek Olšák2014-04-251-0/+6
* r600g/radeonsi: Map transfer staging texture unsynchronized when possibleMichel Dänzer2014-04-161-0/+2
* r600g/radeonsi: Use caching buffer manager for textures as wellMichel Dänzer2014-04-151-1/+1
* radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIKMarek Olšák2014-04-091-5/+5
* r600g,radeonsi: set correct initial domain for shared resourcesMarek Olšák2014-04-091-1/+1
* Revert "radeon: just don't map VRAM buffers at all"Leo Liu2014-04-041-2/+2
* radeonsi: disable fast color clear for 1D-tiled surfaces on CIKMarek Olšák2014-03-221-0/+6
* r600g,radeonsi: use a fallback in dma_copy instead of failingMarek Olšák2014-03-111-13/+5
* radeonsi: implement fast color clearMarek Olšák2014-03-111-1/+5
* r600g: move fast color clear code to a common placeMarek Olšák2014-03-111-2/+81
* r600g,radeonsi: move CMASK register values from r600_surface to r600_textureMarek Olšák2014-03-111-2/+25
* radeonsi: move translate_colorswap to common codeMarek Olšák2014-03-041-0/+54
* r600g,radeonsi: consolidate create_surface and surface_destroyMarek Olšák2014-02-251-1/+51
* radeon: reverse DBG_NO_HYPERZ logicAlex Deucher2014-02-131-1/+1
* gallium: remove PIPE_USAGE_STATICMarek Olšák2014-02-061-4/+4
* r600g,radeonsi: set resource domains in one place (v2)Marek Olšák2014-02-061-5/+2
* radeon: just don't map VRAM buffers at allChristian König2014-02-061-2/+2
* r600g,radeonsi: consolidate the contents of r600_resource.cMarek Olšák2014-01-281-6/+12
* radeonsi: disable HTILE for 1D-tiled depth-stencil buffersMarek Olšák2014-01-061-0/+5