| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | radeon/llvm: Change the tablegen target from AMDIL to AMDGPU | Tom Stellard | 2012-07-30 | 1 | -2/+2 |
| * | radeon/llvm: Add support for encoding SI branch instructions | Tom Stellard | 2012-07-27 | 1 | -15/+35 |
| * | radeon/llvm: Rename namespace from AMDIL to AMDGPU | Tom Stellard | 2012-07-09 | 1 | -12/+12 |
| * | radeonsi: Only dump shaders with environment variable RADEON_DUMP_SHADERS=1. | Michel Dänzer | 2012-06-12 | 1 | -1/+5 |
| * | radeon/llvm: Don't lower RETURN to S_ENDPGM on SI | Tom Stellard | 2012-06-06 | 1 | -0/+4 |
| * | radeonsi: Handle TGSI CONST registers | Tom Stellard | 2012-05-29 | 1 | -0/+34 |
| * | radeon/llvm: More comments and cleanups | Tom Stellard | 2012-05-11 | 1 | -8/+15 |
| * | radeon/llvm: Add some comments | Tom Stellard | 2012-05-10 | 1 | -2/+3 |
| * | radeon/llvm: Remove the ReorderPreloadInstructions pass | Tom Stellard | 2012-05-08 | 1 | -4/+1 |
| * | radeonsi: Fix VGPR_BIT() definition. | Michel Dänzer | 2012-04-19 | 1 | -1/+1 |
| * | radeonsi: initial WIP SI code | Tom Stellard | 2012-04-13 | 1 | -0/+274 |
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