| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | radeon/llvm: reserve also corresponding 128bits reg | Vincent Lejeune | 2012-09-18 | 1 | -0/+1 |
| * | radeon/llvm: Pull changes from external version of the backend | Tom Stellard | 2012-08-23 | 1 | -1/+1 |
| * | radeon/llvm: Add helper function for getting sub reg indices | Tom Stellard | 2012-08-21 | 1 | -0/+12 |
| * | radeon/llvm: Support for predicate bit | Vincent Lejeune | 2012-08-15 | 1 | -0/+13 |
| * | radeon/llvm: Rename namespace from AMDIL to AMDGPU | Tom Stellard | 2012-07-09 | 1 | -28/+28 |
| * | radeon/llvm: Remove unused AMDIL TableGen definitons | Tom Stellard | 2012-06-18 | 1 | -3/+0 |
| * | radeon/llvm: Eliminate CFGStructurizer dependency on AMDIL instructions | Tom Stellard | 2012-06-01 | 1 | -0/+8 |
| * | radeon/llvm: Add some comments | Tom Stellard | 2012-05-10 | 1 | -2/+2 |
| * | radeon/llvm: Use a custom inserter to lower RESERVE_REG | Tom Stellard | 2012-05-08 | 1 | -12/+7 |
| * | radeonsi: initial WIP SI code | Tom Stellard | 2012-04-13 | 1 | -0/+102 |
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