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path: root/src/gallium/drivers/radeon/R600LowerInstructions.cpp
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* radeon/llvm: Use a custom inserter for MASK_WRITETom Stellard2012-05-251-11/+0
* radeon/llvm: Use tablegen pattern to lower bitconvertTom Stellard2012-05-251-9/+0
* radeon/llvm: Use a custom inserter to lower FNEGTom Stellard2012-05-251-17/+0
* radeon/llvm: Use a custom inserter to lower CLAMPTom Stellard2012-05-251-27/+0
* radeon/llvm: Use a custom inserter to lower FABSTom Stellard2012-05-251-10/+0
* radeon/llvm: Lower UDIV using the Selection DAGTom Stellard2012-05-241-139/+0
* radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT)Tom Stellard2012-05-241-16/+0
* radeon/llvm: Expand fsub during ISelTom Stellard2012-05-171-11/+0
* radeon/llvm: Remove AMDIL floating-point ADD instruction defsTom Stellard2012-05-171-1/+1
* radeon/llvm: Remove AMDIL CMOVLOG* instruction defsTom Stellard2012-05-171-16/+0
* radeon/llvm: Move lowering of ABS_i32 to ISelTom Stellard2012-05-171-16/+0
* radeon/llvm: improve ABS_i32 loweringVadim Girlin2012-05-151-13/+5
* radeon/llvm: Lower bitcast instructions to copiesTom Stellard2012-05-141-0/+10
* radeon/llvm: Add some commentsTom Stellard2012-05-101-2/+3
* radeon/llvm: fix ABS_i32 instruction loweringVadim Girlin2012-05-081-2/+2
* r600g/llvm: Lower ULT A, B, C to SETGT_UINT A, C, BTom Stellard2012-05-031-0/+7
* r600g/llvm: Fix handling of MASK_WRITE instructionsTom Stellard2012-04-301-1/+2
* radeon/llvm: Remove AMDILMachineFunctionInfo.cppTom Stellard2012-04-251-3/+0
* r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREGTom Stellard2012-04-231-41/+0
* radeonsi: initial WIP SI codeTom Stellard2012-04-131-0/+546