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path: root/src/gallium/drivers/radeon/R600Instructions.td
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* radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_egTom Stellard2012-05-101-12/+0
* radeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_constTom Stellard2012-05-091-3/+7
* radeon/llvm: Remove the EXPORT_REG instructionTom Stellard2012-05-081-3/+3
* radeon/llvm: Use a custom inserter to lower RESERVE_REGTom Stellard2012-05-081-0/+7
* radeon/llvm: Use a custom inserter to lower STORE_OUTPUTTom Stellard2012-05-081-0/+7
* radeon/llvm: Use a custom inserter to lower LOAD_INPUTTom Stellard2012-05-081-8/+7
* radeon/llvm: add support for CUBE ALU instructionVadim Girlin2012-05-081-1/+12
* radeon/llvm: add support for some ALU instructionsVadim Girlin2012-05-081-10/+51
* radeon/llvm: add support for AHSR/LSHR/LSHL instructionsVadim Girlin2012-05-081-0/+8
* radeon/llvm: add support for TXQ/TXF/DDX/DDY instructionsVadim Girlin2012-05-081-0/+21
* radeon/llvm: add support for v4i32Vadim Girlin2012-05-081-0/+10
* r600g/llvm: Add pattern for llvm.AMDGPU.kill v2Dragomir Ivanov2012-04-301-0/+5
* r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREGTom Stellard2012-04-231-7/+10
* r600/llvm: Add LOAD_VTX instructionTom Stellard2012-04-231-0/+13
* radeonsi: initial WIP SI codeTom Stellard2012-04-131-0/+931