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src
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gallium
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drivers
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radeon
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R600InstrInfo.cpp
Commit message (
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Author
Age
Files
Lines
*
radeon/llvm: Eliminate CFGStructurizer dependency on AMDIL instructions
Tom Stellard
2012-06-01
1
-0
/
+16
*
radeon/llvm: Lower UDIV using the Selection DAG
Tom Stellard
2012-05-24
1
-35
/
+0
*
radeon/llvm: Remove auto-generated AMDIL->ISA conversion code
Tom Stellard
2012-05-24
1
-1
/
+1
*
radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR)
Tom Stellard
2012-05-24
1
-4
/
+0
*
radeon/llvm: Remove AMDIL ADD instructions
Tom Stellard
2012-05-24
1
-2
/
+0
*
radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT)
Tom Stellard
2012-05-24
1
-2
/
+0
*
radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes
Tom Stellard
2012-05-24
1
-0
/
+6
*
radeon/llvm: Handle selectcc DAG node
Tom Stellard
2012-05-20
1
-0
/
+4
*
radeon/llvm: Add some comments
Tom Stellard
2012-05-10
1
-2
/
+2
*
radeon/llvm: add support for AHSR/LSHR/LSHL instructions
Vadim Girlin
2012-05-08
1
-0
/
+12
*
r600g/llvm: Handle copies between vector registers
Tom Stellard
2012-04-23
1
-2
/
+20
*
r600g/llvm: Remove debugging hack from R600InstrInfo::copyPhysReg()
Tom Stellard
2012-04-23
1
-4
/
+0
*
radeonsi: initial WIP SI code
Tom Stellard
2012-04-13
1
-0
/
+109