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path: root/src/gallium/drivers/radeon/R600CodeEmitter.cpp
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* radeon/llvm: Use the MCCodeEmitter for R600Tom Stellard2012-08-231-618/+0
* radeon/llvm: Add flag operand to some instructionsTom Stellard2012-08-231-11/+14
* radeon/llvm: ExpandSpecialInstrs - Add support for cube instructionsTom Stellard2012-08-211-44/+17
* radeon/llvm: ExpandSpecialInstrs - Add support for vector instructionsTom Stellard2012-08-211-9/+4
* radeon/llvm: Add R600ExpandSpecialInstrs passTom Stellard2012-08-211-14/+12
* radeon/llvm: Support for predicate bitVincent Lejeune2012-08-151-3/+31
* radeon/llvm: Cleanup AMDGPUUtil.cppApostolos Bartziokas2012-08-151-7/+7
* radeon/llvm: Use correct opcocde for BREAK_LOGICALNZ_i32Tom Stellard2012-08-141-1/+4
* radeon/llvm: Merge AMDILSubtarget into AMDGPUSubtargetTom Stellard2012-07-301-1/+1
* radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cppTom Stellard2012-07-301-1/+1
* radeon/llvm: Change the tablegen target from AMDIL to AMDGPUTom Stellard2012-07-301-2/+2
* radeon/llvm: Fix a bug with IF LOGICALNZ with int operandVincent Lejeune2012-07-231-1/+3
* radeon/llvm: Coding style fixesTom Stellard2012-07-131-119/+119
* radeon/llvm: Use multiclasses for floating point loadsTom Stellard2012-07-111-3/+6
* radeon/llvm: Rename namespace from AMDIL to AMDGPUTom Stellard2012-07-091-28/+28
* radeon/llvm: Enable vec4 loads on R600Tom Stellard2012-06-291-0/+1
* radeon/llvm: Emit raw ISA for vertex fetch instructionsTom Stellard2012-06-291-53/+5
* radeon/llvm: Emulate RECIP_UINT instruction on CaymanTom Stellard2012-06-061-0/+2
* radeon/llvm: Remove some duplicate code in the R600 CodeEmitterTom Stellard2012-06-061-9/+3
* radeon/llvm: Fix MULLO* instructions on CaymanTom Stellard2012-06-061-6/+12
* radeon/llvm: Fix VTX_READ patternsTom Stellard2012-06-011-1/+1
* radeon/llvm: Emit 2 bytes for vertex fetch offsetsTom Stellard2012-06-011-1/+1
* radeon/llvm: Change prefix on tablegen files to AMDGPUTom Stellard2012-06-011-1/+1
* radeon/llvm: Remove AMDIL GLOBALLOAD* instructionsTom Stellard2012-06-011-2/+3
* radeon/llvm: add support for texture offsets, fix TEX_LDVadim Girlin2012-05-151-6/+9
* radeon/llvm: Coding style fixes for R600CodeEmitter.cppTom Stellard2012-05-141-148/+90
* radeon/llvm: More comments and cleanupsTom Stellard2012-05-111-16/+0
* radeon/llvm: Add some commentsTom Stellard2012-05-101-2/+7
* radeon/llvm: Move util functions into AMDGPU namespaceTom Stellard2012-05-101-5/+5
* radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_egTom Stellard2012-05-101-5/+0
* radeon/llvm: Remove AMDILUtilityFunctions.cppTom Stellard2012-05-081-39/+0
* radeon/llvm: add support for CUBE ALU instructionVadim Girlin2012-05-081-20/+38
* radeon/llvm: add missing cases for BREAK/CONTINUEVadim Girlin2012-05-081-0/+2
* radeon/llvm: Add subtarget feature: DumpCodeTom Stellard2012-05-011-3/+1
* radeon/llvm: Remove AMDILMachineFunctionInfo.cppTom Stellard2012-04-251-3/+0
* radeon/llvm: Lower VCREATE_v4f32 for R600 and SITom Stellard2012-04-231-4/+0
* r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREGTom Stellard2012-04-231-23/+1
* r600g/llvm: Only emit an instruction's explicit operandsTom Stellard2012-04-231-2/+2
* r600g/llvm: Tell the code emitter to ignore KILL and BUNDLETom Stellard2012-04-231-1/+3
* radeonsi: initial WIP SI codeTom Stellard2012-04-131-0/+776
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