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	Commit message (Expand)	Author	Age	Files	Lines
*	radeon/llvm: Support for predicate bit	Vincent Lejeune	2012-08-15	1	-3/+31
*	radeon/llvm: Cleanup AMDGPUUtil.cpp	Apostolos Bartziokas	2012-08-15	1	-7/+7
*	radeon/llvm: Use correct opcocde for BREAK_LOGICALNZ_i32	Tom Stellard	2012-08-14	1	-1/+4
*	radeon/llvm: Merge AMDILSubtarget into AMDGPUSubtarget	Tom Stellard	2012-07-30	1	-1/+1
*	radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cpp	Tom Stellard	2012-07-30	1	-1/+1
*	radeon/llvm: Change the tablegen target from AMDIL to AMDGPU	Tom Stellard	2012-07-30	1	-2/+2
*	radeon/llvm: Fix a bug with IF LOGICALNZ with int operand	Vincent Lejeune	2012-07-23	1	-1/+3
*	radeon/llvm: Coding style fixes	Tom Stellard	2012-07-13	1	-119/+119
*	radeon/llvm: Use multiclasses for floating point loads	Tom Stellard	2012-07-11	1	-3/+6
*	radeon/llvm: Rename namespace from AMDIL to AMDGPU	Tom Stellard	2012-07-09	1	-28/+28
*	radeon/llvm: Enable vec4 loads on R600	Tom Stellard	2012-06-29	1	-0/+1
*	radeon/llvm: Emit raw ISA for vertex fetch instructions	Tom Stellard	2012-06-29	1	-53/+5
*	radeon/llvm: Emulate RECIP_UINT instruction on Cayman	Tom Stellard	2012-06-06	1	-0/+2
*	radeon/llvm: Remove some duplicate code in the R600 CodeEmitter	Tom Stellard	2012-06-06	1	-9/+3
*	radeon/llvm: Fix MULLO* instructions on Cayman	Tom Stellard	2012-06-06	1	-6/+12
*	radeon/llvm: Fix VTX_READ patterns	Tom Stellard	2012-06-01	1	-1/+1
*	radeon/llvm: Emit 2 bytes for vertex fetch offsets	Tom Stellard	2012-06-01	1	-1/+1
*	radeon/llvm: Change prefix on tablegen files to AMDGPU	Tom Stellard	2012-06-01	1	-1/+1
*	radeon/llvm: Remove AMDIL GLOBALLOAD* instructions	Tom Stellard	2012-06-01	1	-2/+3
*	radeon/llvm: add support for texture offsets, fix TEX_LD	Vadim Girlin	2012-05-15	1	-6/+9
*	radeon/llvm: Coding style fixes for R600CodeEmitter.cpp	Tom Stellard	2012-05-14	1	-148/+90
*	radeon/llvm: More comments and cleanups	Tom Stellard	2012-05-11	1	-16/+0
*	radeon/llvm: Add some comments	Tom Stellard	2012-05-10	1	-2/+7
*	radeon/llvm: Move util functions into AMDGPU namespace	Tom Stellard	2012-05-10	1	-5/+5
*	radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_eg	Tom Stellard	2012-05-10	1	-5/+0
*	radeon/llvm: Remove AMDILUtilityFunctions.cpp	Tom Stellard	2012-05-08	1	-39/+0
*	radeon/llvm: add support for CUBE ALU instruction	Vadim Girlin	2012-05-08	1	-20/+38
*	radeon/llvm: add missing cases for BREAK/CONTINUE	Vadim Girlin	2012-05-08	1	-0/+2
*	radeon/llvm: Add subtarget feature: DumpCode	Tom Stellard	2012-05-01	1	-3/+1
*	radeon/llvm: Remove AMDILMachineFunctionInfo.cpp	Tom Stellard	2012-04-25	1	-3/+0
*	radeon/llvm: Lower VCREATE_v4f32 for R600 and SI	Tom Stellard	2012-04-23	1	-4/+0
*	r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREG	Tom Stellard	2012-04-23	1	-23/+1
*	r600g/llvm: Only emit an instruction's explicit operands	Tom Stellard	2012-04-23	1	-2/+2
*	r600g/llvm: Tell the code emitter to ignore KILL and BUNDLE	Tom Stellard	2012-04-23	1	-1/+3
*	radeonsi: initial WIP SI code	Tom Stellard	2012-04-13	1	-0/+776