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* gallium/radeon: remove unused code - radeon_llvm_util.*Marek Olšák2016-07-051-2/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: implement randomized SDMA texture copy testing (v2)Marek Olšák2016-05-101-0/+1
| | | | | | | | | | | v2: - adjustments for exercising all important SDMA code paths - decrease the probability of getting huge sizes (faster testing) - increase the probability of getting power-of-two dimensions - change the memory cap to 128MB (faster testing) - better detect which engine has been used Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move scissor and viewport states into gallium/radeonMarek Olšák2016-04-121-0/+1
| | | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement AMD_performance_monitor for CIK+Nicolai Hähnle2015-11-251-0/+1
| | | | | | | | | | | | | | | | | | Expose most of the performance counter groups that are exposed by Catalyst. Ideally, the driver will work with GPUPerfStudio at some point, but we are not quite there yet. In any case, this is the reason for grouping multiple instances of hardware blocks in the way it is implemented. The counters can also be shown using the Gallium HUD. If one is interested to see how work is distributed across multiple shader engines, one can set the environment variable RADEON_PC_SEPARATE_SE=1 to obtain finer-grained performance counter groups. Part of the implementation is in radeon because an implementation for older hardware would largely follow along the same lines, but exposing a different set of blocks which are programmed slightly differently. Reviewed-by: Marek Olšák <[email protected]>
* radeon/vce: add new firmware interface supportLeo Liu2015-11-201-0/+1
| | | | | | | | Add new interface to create and encode Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon: move R600_QUERY_* constants into a new query header fileNicolai Hähnle2015-11-181-0/+1
| | | | | | | More query-related structures will have to be moved into their own header file to support hardware-specific performance counters. Reviewed-by: Marek Olšák <[email protected]>
* radeon/vce: adapt new firmware interface changesChristian König2015-05-221-0/+1
| | | | | | | | | v2: make this also compatible with original released firmware v3 (chk): switch to original idea of separate files for fw versions Signed-off-by: Leo Liu <[email protected]> Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> (v2)
* winsys/radeon: move radeon_winsys.h to drivers/radeonMarek Olšák2015-04-291-1/+2
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* r600g,radeonsi: add a driver query returning GPU loadMarek Olšák2015-04-281-0/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: ship all files in the tarballEmil Velikov2014-09-051-7/+17
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript & LLVM note Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* r600g: move cayman MSAA setup to a common placeMarek Olšák2014-03-111-0/+1
| | | | | | I will use this in radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* radeon: Include radeon_elf_util.c in the list of LLVM_C_FILES v2Tom Stellard2014-03-071-1/+1
| | | | | | | | | | | | | | | | | This fixes the a build breakage caused by 6974eb907600b9d0176d3158ff0fd30ac3e56a55 on build configurations where all the following are true: 1. radeonsi is not being built 2. r600g is being built 3. opencl is disabled 4. --enable-r600-llvm-compiler is not being used 5. libelf is not installed v2: - Add $(RADEON_CFLAGS) to libllvmradeon_la_CFLAGS Tested-by: Brian Paul <[email protected]>
* radeon/llvm: Factor elf parsing code out into its own functionTom Stellard2014-03-071-0/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon/vce: initial VCE support v8Christian König2014-02-131-1/+3
| | | | | | | | | | | | | | v2 (chk): revert feedback buffer hack v3 (slava): fixed bitstream size calculation v4 (chk): always create buffers in the right domain v5 (chk): flush async v6 (chk): rework fw interface add version check v7 (leo): implement cropping support v8 (chk): add hw checks Signed-off-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Signed-off-by: Slava Grigorev <[email protected]>
* radeon/video: seperate common video functionsChristian König2014-02-061-0/+1
| | | | Signed-off-by: Christian König <[email protected]>
* r600g: move queries to drivers/radeonMarek Olšák2014-01-281-0/+1
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon: move some functions to r600_buffer_common.cMarek Olšák2013-12-121-0/+1
| | | | | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christoph Brill <[email protected]> v2: Renamed r600_buffer.c to r600_buffer_common.c. The stupid build system doesn't allow 2 files of the same name in different directories.
* r600g,radeonsi: share r600_texture.cMarek Olšák2013-09-291-0/+1
| | | | | | | | | The function r600_choose_tiling is new and needs a review. The only change in functionality is that it enables 2D tiling for compressed textures on SI. It was probably accidentally turned off. v2: don't make scanout buffers linear
* r600g: move streamout state to drivers/radeonMarek Olšák2013-08-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This streamout state code will be used by radeonsi. There are new structures r600_common_context and r600_common_screen. What is inherited by what is shown here: pipe_context -> r600_common_context -> r600_context pipe_screen -> r600_common_screen -> r600_screen The common structures reside in drivers/radeon. Currently they only contain enough functionality to be able to handle streamout. Eventually I'd like the whole pipe_screen implementation to be shared and some of the context stuff too. This is quite big, but most changes are because of the new structures and the fact r600_write_value is replaced by radeon_emit. Thanks to Tom Stellard for fixing the build for r600g/compute. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA v2Tom Stellard2013-05-061-3/+1
| | | | | | | | | | | The LLVM C API is considered stable and should never change, so it is much more desirable to use than the LLVM C++ API, which is constantly in flux. v2: - Split target initialization and lookup into separate functions Reviewed-by: [email protected]
* radeon/uvd: add UVD implementation v5Christian König2013-04-111-2/+5
| | | | | | | | | | | | | | Just everything you need for UVD with r600g and radeonsi. v2: move UVD code to radeon subdir, clean up build system additions, remove an unused SI function, disable tiling on SI for now. v3: some minor indentation fix and rebased v4: dpb size calculation fixed v5: implement proper fall-back in case the kernel doesn't support UVD, based on patches from Andreas Boll but cleaned up a bit more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/llvm: Make radeon_llvm_util.cpp a C fileTom Stellard2013-03-131-3/+3
| | | | All the functions in this file are now implemented in C.
* r600g/llvm: Move llvm wrapper functions into the radeon directoryTom Stellard2013-03-131-1/+2
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* radeon/llvm: Convert to AutomakeTom Stellard2013-01-101-2/+2
| | | | | | | | v2: Johannes Obermayr <[email protected]> Fix some undefined symbols. v3: Johannes Obermayr <[email protected]> Build it -shared to fix egl_gallium.so on r600/radeonsi builds.
* radeon/llvm: Remove backend code from MesaTom Stellard2013-01-041-83/+0
| | | | | | | | | | | | This code now lives in an external tree. For the next Mesa release fetch the code from the master branch of this LLVM repo: http://cgit.freedesktop.org/~tstellar/llvm/ For all subsequent Mesa releases, fetch the code from the official LLVM project: www.llvm.org
* radeon: Support LLVM 3.2Tom Stellard2012-10-011-3/+4
| | | | | LLVM 3.2 and newer requires that the R600/SI backend be part of the LLVM tree.
* radeon/llvm: Inital flow control support for SITom Stellard2012-09-171-0/+1
| | | | | | This adds basic flow control support for If-Then-Else blocks using predicates (stored in the EXEC register) and a predicate stack for nested flow control.
* radeon/llvm: Move kernel arg lowering into R600TargetLowering classTom Stellard2012-09-171-1/+0
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* radeon/llvm: Remove R600InstrInfo.td from TD_FILESTom Stellard2012-09-061-1/+0
| | | | | Fixes build bug introduced by cebbdd4ac23725963207bf6f8fc7101150e6065f
* radeon/llvm: Cleanup makefileTom Stellard2012-09-061-0/+26
| | | | | Hopefully, this will fix all the parallel make problems people have been having.
* radeon/llvm: Rework how immediate operands are handled with SITom Stellard2012-08-311-0/+1
| | | | | | | Immediate operands were previously handled in the CodeEmitter, but that code was buggy and very confusing. This commit adds a pass that simplifies the handling of immediate operands by spliting the loading of the immediate into a sperate insruction that is bundled with the original.
* radeon/llvm: Pull changes from external version of the backendTom Stellard2012-08-231-3/+3
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* radeon/llvm: Use the MCCodeEmitter for R600Tom Stellard2012-08-231-1/+1
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* radeon/llvm: Use the MCCodeEmitter for SITom Stellard2012-08-231-1/+3
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* radeon/llvm: Add AsmPrinterTom Stellard2012-08-231-0/+3
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* radeon/llvm: Add R600ExpandSpecialInstrs passTom Stellard2012-08-211-0/+1
| | | | | This pass expends reduction instructions into a MachineInstrBundle that contains 4 instruction, one for each instruction slot.
* radeon/llvm: Remove AMDGPUUtil.cppTom Stellard2012-08-151-1/+0
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* radeon/llvm: Merge AMDILSubtarget into AMDGPUSubtargetTom Stellard2012-07-301-1/+0
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* radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cppTom Stellard2012-07-301-1/+0
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* radeon/llvm: Merge AMDILRegisterInfo into AMDGPURegisterInfoTom Stellard2012-07-301-1/+0
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* radeon/llvm: Change the tablegen target from AMDIL to AMDGPUTom Stellard2012-07-301-0/+1
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* radeon/llvm: Use the VLIW Scheduler for R600->NITom Stellard2012-06-211-1/+2
| | | | | | | | | | | | | | | | | | | It's not optimal, but it's better than the register pressure scheduler that was previously being used. The VLIW scheduler currently ignores all the complicated instruction groups restrictions and just tries to fill the instruction groups with as many instructions as possible. Though, it does know enough not to put two trans only instructions in the same group. We are able to ignore the instruction group restrictions in the LLVM backend, because the finalizer in r600_asm.c will fix any illegal instruction groups the backend generates. Enabling the VLIW scheduler improved the run time for a sha1 compute shader by about 50%. I'm not sure what the impact will be for graphics shaders. I tested Lightsmark with the VLIW scheduler enabled and the framerate was about the same, but it might help apps that use really big shaders.
* radeon/llvm: Remove AMDIL VCREATE* instructionsTom Stellard2012-06-061-1/+0
| | | | This obsoletes the AMDGPULowerInstruction pass.
* radeon/llvm: Remove AMDIL LOADCONST* instructionsTom Stellard2012-06-061-2/+0
| | | | This obsoletes the R600LowerInstruction and SIPropagateImmReads passes.
* radeon/llvm: Change prefix on tablegen files to AMDGPUTom Stellard2012-06-011-9/+9
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* radeon/llvm: Remove AMDILTargetMachineTom Stellard2012-05-291-1/+0
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* radeon/llvm: Remove auto-generated AMDIL->ISA conversion codeTom Stellard2012-05-241-4/+1
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* radeon/llvm: Remove AMDILMachinePeephole passTom Stellard2012-05-241-1/+0
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* radeon/llvm: Remove AMDILMCCodeEmitter.cppTom Stellard2012-05-101-1/+0
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* radeon/llvm: Remove SILowerShaderInstructions.cppTom Stellard2012-05-101-1/+0
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