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radeon
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Author
Age
Files
Lines
*
radeon/llvm: Fix instruction encoding for r600 family GPUs
Tom Stellard
2012-09-24
1
-2
/
+2
*
radeon/llvm: Handle loads from the constants address space.
Tom Stellard
2012-09-21
1
-0
/
+1
*
radeon/llvm: Add support for v4f32 stores on R600
Tom Stellard
2012-09-21
1
-1
/
+2
*
radeon/llvm: Add support for i8 reads on R600
Tom Stellard
2012-09-21
1
-0
/
+1
*
radeon/llvm: Emit ISA for ALU instructions in the R600 code emitter
Michal Sciubidlo
2012-09-19
1
-87
/
+122
*
radeon/llvm: Add register encoding for VCC
Tom Stellard
2012-09-11
1
-0
/
+1
*
radeon/llvm: Extend SI EXEC register support.
Michel Dänzer
2012-09-06
1
-0
/
+3
*
radeon/llvm: Rework how immediate operands are handled with SI
Tom Stellard
2012-08-31
1
-25
/
+14
*
radeon/llvm: Fix encoding of FP immediates on SI
Tom Stellard
2012-08-29
1
-1
/
+6
*
radeon/llvm: Set End of Program bit on RAT instructions
Tom Stellard
2012-08-23
1
-2
/
+0
*
radeon/llvm: Fix some coding style issues
Tom Stellard
2012-08-23
4
-33
/
+22
*
radeon/llvm: Pull changes from external version of the backend
Tom Stellard
2012-08-23
7
-22
/
+22
*
radeon/llvm: Use the MCCodeEmitter for R600
Tom Stellard
2012-08-23
4
-13
/
+724
*
radeon/llvm: Use the MCCodeEmitter for SI
Tom Stellard
2012-08-23
6
-6
/
+478
*
radeon/llvm: Add AsmPrinter
Tom Stellard
2012-08-23
1
-0
/
+11
*
radeon/llvm: Change the tablegen target from AMDIL to AMDGPU
Tom Stellard
2012-07-30
1
-11
/
+11
*
radeon/llvm: Change prefix on tablegen files to AMDGPU
Tom Stellard
2012-06-01
2
-6
/
+6
*
radeon/llvm: Remove AMDILTargetMachine
Tom Stellard
2012-05-29
2
-7
/
+1
*
radeonsi: initial WIP SI code
Tom Stellard
2012-04-13
4
-0
/
+239