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path: root/src/gallium/drivers/radeon/AMDGPUInstructions.td
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* radeon/llvm: Move conditional pattern leafs to common tablegen fileTom Stellard2012-07-271-0/+41
* radeon/llvm: Rename namespace from AMDIL to AMDGPUTom Stellard2012-07-091-1/+1
* radeon/llvm: Use the VLIW Scheduler for R600->NITom Stellard2012-06-211-0/+1
* radeon/llvm: Remove AMDIL VCREATE* instructionsTom Stellard2012-06-061-0/+6
* radeon/llvm: Use a custom inserter for MASK_WRITETom Stellard2012-05-251-13/+2
* radeon/llvm: Use tablegen pattern to lower bitconvertTom Stellard2012-05-251-0/+6
* radeon/llvm: Use a custom inserter to lower FNEGTom Stellard2012-05-251-0/+7
* radeon/llvm: Use a custom inserter to lower CLAMPTom Stellard2012-05-251-0/+17
* radeon/llvm: Use a custom inserter to lower FABSTom Stellard2012-05-251-1/+13
* radeon/llvm: Remove auto-generated AMDIL->ISA conversion codeTom Stellard2012-05-241-2/+7
* radeon/llvm: Add some commentsTom Stellard2012-05-101-2/+3
* radeon/llvm: Remove the EXPORT_REG instructionTom Stellard2012-05-081-7/+0
* radeon/llvm: Use a custom inserter to lower RESERVE_REGTom Stellard2012-05-081-7/+0
* radeon/llvm: Use a custom inserter to lower STORE_OUTPUTTom Stellard2012-05-081-7/+0
* radeon/llvm: Use a custom inserter to lower LOAD_INPUTTom Stellard2012-05-081-6/+0
* radeon/llvm: Remove the ReorderPreloadInstructions passTom Stellard2012-05-081-8/+3
* r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREGTom Stellard2012-04-231-0/+21
* radeonsi: initial WIP SI codeTom Stellard2012-04-131-0/+90