| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | radeon/llvm: Remove backend code from Mesa | Tom Stellard | 2013-01-04 | 1 | -71/+0 |
| | | | | | | | | | | | | | This code now lives in an external tree. For the next Mesa release fetch the code from the master branch of this LLVM repo: http://cgit.freedesktop.org/~tstellar/llvm/ For all subsequent Mesa releases, fetch the code from the official LLVM project: www.llvm.org | ||||
| * | radeon/llvm: Replace AMDGPU pow intrinsic with the llvm version | Tom Stellard | 2012-09-21 | 1 | -0/+2 |
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| * | radeon/llvm: Lower ROTL to BIT_ALIGN | Tom Stellard | 2012-06-21 | 1 | -0/+14 |
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| * | radeon/llvm: Lower UDIV using the Selection DAG | Tom Stellard | 2012-05-24 | 1 | -0/+6 |
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| * | radeon/llvm: Add custom SDNode for FRACT | Tom Stellard | 2012-05-24 | 1 | -0/+3 |
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| * | radeon/llvm: Add DAG nodes for MIN instructions | Tom Stellard | 2012-05-17 | 1 | -0/+15 |
| | | | | | Also, remove the AMDIL MIN* instruction defs. | ||||
| * | radeon/llvm: Add custom SDNodes for MAX | Tom Stellard | 2012-05-17 | 1 | -0/+31 |
| We now lower the various intrinsics for max to SDNodes and then use tablegen patterns to lower the SDNodes to instructions. | |||||
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index : mesa.git | |
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