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path: root/src/gallium/drivers/radeon/AMDGPUISelLowering.h
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* radeon/llvm: Fix lowering of vbuildTom Stellard2012-09-131-2/+0
* radeon/llvm: Pull changes from external version of the backendTom Stellard2012-08-231-1/+1
* radeon/llvm: Lower loads from USE_SGPR adddress space during DAG loweringTom Stellard2012-08-151-10/+0
* radeon/llvm: Add live-in registers during DAG loweringTom Stellard2012-08-151-0/+6
* radeon/llvm: Remove CMOVLOG DAG nodeTom Stellard2012-08-021-2/+0
* radeon/llvm: Merge AMDILTargetLowering class into AMDGPUTargetLoweringTom Stellard2012-07-301-3/+53
* radeon/llvm: Remove lowering code for unsupported featuresTom Stellard2012-07-301-0/+12
* radeon/llvm: Add special nodes for SALU operations on VCCTom Stellard2012-07-271-0/+10
* radeon/llvm: Move LowerSELECT_CC into R600ISelLoweringTom Stellard2012-07-271-1/+0
* radeon/llvm: Use multiclasses for floating point loadsTom Stellard2012-07-111-1/+0
* radeon/llvm: Handle floating point loads on R600Tom Stellard2012-06-291-0/+1
* radeon/llvm: Lower ROTL to BIT_ALIGNTom Stellard2012-06-211-0/+1
* radeon/llvm: Remove unused AMDIL TableGen definitonsTom Stellard2012-06-181-1/+1
* radeon/llvm: Lower UDIV using the Selection DAGTom Stellard2012-05-241-0/+2
* radeon/llvm: Add custom SDNode for FRACTTom Stellard2012-05-241-0/+1
* radeon/llvm: Use -1 as true value for SET* integer instructionsTom Stellard2012-05-241-2/+2
* radeon/llvm: Handle selectcc DAG nodeTom Stellard2012-05-201-0/+4
* radeon/llvm: Add DAG nodes for MIN instructionsTom Stellard2012-05-171-0/+3
* radeon/llvm: Lower lrp intrinsic during ISelTom Stellard2012-05-171-0/+1
* radeon/llvm: Move lowering of ABS_i32 to ISelTom Stellard2012-05-171-0/+1
* radeon/llvm: Add custom SDNodes for MAXTom Stellard2012-05-171-0/+21
* radeon/llvm: More comments and cleanupsTom Stellard2012-05-111-3/+10
* radeon/llvm: Add some comments and fix coding styleTom Stellard2012-05-081-2/+3
* radeonsi: initial WIP SI codeTom Stellard2012-04-131-0/+35