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path: root/src/gallium/drivers/r600
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* gallium: add PIPE_CAP_MAX_VARYINGSKarol Herbst2019-02-071-0/+3
* r600: add -Wstrict-overflow=0 to meson to silence the warningMarek Olšák2019-01-301-1/+1
* r600: remove redundant semicolonNicolai Hähnle2018-12-191-1/+1
* winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handleMarek Olšák2018-11-281-1/+4
* r600: make suballocator 256-bytes alignDave Airlie2018-11-291-1/+1
* winsys/amdgpu: explicitly declare whether buffer_map is permanent or notNicolai Hähnle2018-11-286-9/+21
* r600: clean up the GS ring buffers when the context is destroyedGert Wollny2018-11-211-0/+6
* r600: Only set context streamout strides info from the shader that has outputsGert Wollny2018-11-191-3/+9
* radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET onlyMarek Olšák2018-11-094-4/+4
* r600: Add support for EXT_texture_sRGB_R8Gert Wollny2018-11-061-0/+1
* r600/sb: Fix constant logical operand in assert.Vinson Lee2018-11-041-1/+1
* configure: allow building with python3Emil Velikov2018-10-311-1/+1
* gallium: rework PIPE_HANDLE_USAGE_* flagsMarek Olšák2018-10-301-1/+1
* util: Change remaining uint32 cache ids to sha1David McFarland2018-10-261-21/+22
* Fix setting indent-tabs-mode in the Emacs .dir-locals.el filesNeil Roberts2018-10-171-1/+1
* r600/sb: Fix constant-logical-operand warning.Vinson Lee2018-10-121-1/+1
* r600: use build-id when available for disk cacheTimothy Arceri2018-10-031-7/+7
* r600/sb: use safe math optimizations when TGSI contains precise operationsGert Wollny2018-09-153-1/+5
* r600: fix HTILE for NPOT textures with mipmappingMarek Olšák2018-09-101-2/+2
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-071-0/+4
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-063-2/+3
* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-062-4/+4
* gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITSMarek Olšák2018-09-061-0/+1
* gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}Erik Faye-Lund2018-09-051-0/+10
* gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERSErik Faye-Lund2018-09-051-0/+4
* gallium: Add a helper for implementing PIPE_CAP_* default values.Eric Anholt2018-09-041-1/+3
* gallium: Split out PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE.Kenneth Graunke2018-08-241-0/+1
* Revert "configure: allow building with python3"Emil Velikov2018-08-241-1/+1
* gallium: add PIPE_CAP_MAX_SHADER_BUFFER_SIZEMarek Olšák2018-08-231-0/+2
* gallium: add PIPE_CAP_MAX_GS_INVOCATIONSMarek Olšák2018-08-231-0/+3
* configure: allow building with python3Emil Velikov2018-08-231-1/+1
* r600/eg: rework atomic counter emission with flushesDave Airlie2018-08-216-31/+54
* meson: Build with Python 3Mathieu Bridon2018-08-101-1/+1
* python: Use the unicode_escape codecMathieu Bridon2018-08-011-1/+1
* radeonsi: use storage_samples instead of color_samples in most placesMarek Olšák2018-07-311-2/+2
* gallium: add storage_sample_count parameter into is_format_supportedMarek Olšák2018-07-314-1/+11
* gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTSMarek Olšák2018-07-311-0/+1
* r600: reduce num compute threads to 1024.Dave Airlie2018-07-311-1/+1
* r600: Scale integer valued texture border colors to float (v2)Gert Wollny2018-07-251-1/+44
* r600: enable tess_input_info for TESDave Airlie2018-07-231-14/+6
* r600: Correct evaluation of cube array index and faceGert Wollny2018-07-201-1/+33
* r600: correct texture offset for array index lookupGert Wollny2018-07-201-5/+37
* r600: Delay emission of texture gradients and lookup offsetsGert Wollny2018-07-201-44/+48
* r600: silence the signed overflow warning like radeonsiMarek Olšák2018-07-181-1/+1
* r600: fix warnings when unref'ing pool->boMarek Olšák2018-07-171-3/+3
* r600g: some -Wsign-compare fixesKonstantin Kharlamov2018-07-176-14/+13
* r600g: constify some variablesKonstantin Kharlamov2018-07-175-10/+10
* r600g: do not use "fast-clear" for small textures (v3)Konstantin Kharlamov2018-07-171-0/+10
* r600: fix build after the removal of RADEON_PRIO_* flagsMarek Olšák2018-07-167-21/+12
* radeonsi: merge DCC/CMASK/HTILE priority flagsMarek Olšák2018-07-162-3/+3
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