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* r600g: rewrite FMASK allocation, fix FMASK texturing with 2 and 4 samplesMarek Olšák2013-05-157-36/+42
| | | | | | | | | | | | This fixes and enables texturing with compressed MSAA colorbuffers on Evergreen and Cayman. For the first time, multisample textures work on Cayman. This requires the libdrm flag RADEON_SURF_FMASK. v2: require libdrm_radeon 2.4.45 Reviewed-by: Alex Deucher <[email protected]>
* r600g/sb: add missing cases for ARUBA chipsVadim Girlin2013-05-142-0/+2
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: get rid of standard c++ streamsVadim Girlin2013-05-1424-545/+592
| | | | | | | | | | | | Static initialization of internal libstdc++ data related to iostream causes segfaults with some apps. This patch replaces all uses of std::ostream and std::ostringstream in sb with custom lightweight classes. Prevents segfaults with ut2004demo and probably some other old apps. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: separate bytecode decoding and parsingVadim Girlin2013-05-146-144/+163
| | | | | | | | | Parsing and ir construction is required for optimization only, it's unnecessary if we only need to print shader dump. This should make new disassembler more tolerant to any new features in the bytecode. Signed-off-by: Vadim Girlin <[email protected]>
* gallium: add PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE for GLMarek Olšák2013-05-111-0/+3
| | | | | | v2: fix typo 65535 -> 65536 Reviewed-by: Brian Paul <[email protected]>
* r600g: increase array size for shader inputs and outputsMarek Olšák2013-05-102-2/+4
| | | | | | | and add assertions to prevent buffer overflow. This fixes corruption of the r600_shader struct. NOTE: This is a candidate for the stable branches.
* r600g/sb: optimize some cases for CNDxx instructionsVadim Girlin2013-05-072-5/+81
| | | | | | | | | | | | | | We can replace CNDxx with MOV (and possibly eliminate after propagation) in following cases: If src1 is equal to src2 in CNDxx instruction then the result doesn't depend on condition and we can replace the instruction with "MOV dst, src1". If src0 is const then we can evaluate the condition at compile time and also replace it with MOV. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix memory leaksVadim Girlin2013-05-072-1/+7
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix kcache handling on r6xxVadim Girlin2013-05-071-1/+5
| | | | | | | | | Use the same limit for kcache constants in alu group on r6xx as on other chips (two const pairs). Relaxing this will require additional checks to make sure that all 4 consts in the group come from 2 kcache sets (clause limit), probably without noticeable improvements of shader performance. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/llvm: Parse config values in register / value pairsTom Stellard2013-05-061-3/+30
| | | | Rather than relying on a predetermined order for the config values.
* r600g/llvm: Don't feed LLVM output through r600_bytecode_build()Tom Stellard2013-05-063-394/+20
| | | | | The LLVM backend emits raw ISA now, so we can just its output unmodified.
* r600g/llvm: Don't emit CALL_FS for vertex shadersTom Stellard2013-05-061-7/+9
| | | | The LLVM backend takes care of this now.
* radeon/llvm: Always build libradeonllvm as staticTom Stellard2013-05-061-1/+1
| | | | | | | | | This library is very small, so there is not much to gain from building it as a shared library. Also, when linking statically with LLVM, a shared libradeonllvm exports LLVM symbols and creates problems when used with other shared objects that also link statically to LLVM. Reviewed-by: [email protected]
* r600g/llvm: Update radeon family mappings for LLVM backendTom Stellard2013-05-061-3/+7
| | | | | New processors were added to the backend to distinguish between GPUs with and without vertex caches.
* r600g/llvm: Undefines unrequired texture coord valuesVincent Lejeune2013-05-041-1/+28
| | | | | This is a port of "r600g:mask unused source components for SAMPLE" patch from Vadim Girlin.
* gallium: fix type of flags in pipe_context::flush()Chia-I Wu2013-05-041-1/+1
| | | | | | | | | | | | | | | | It should be unsigned, not enum pipe_flush_flags. Fixed a build error: src/gallium/state_trackers/egl/android/native_android.cpp:426:29: error: invalid conversion from 'int' to 'pipe_flush_flags' [-fpermissive] v2: replace all occurrences of enum pipe_flush_flags by unsigned Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Marek Olšák <[email protected]> [olv: document the parameter now that the type is unsigned]
* r600g: Correctly initialize the shader key, v2Lauri Kasanen2013-05-031-1/+2
| | | | | | | | | | | | | | | | | | | | | Assigning a struct only copies the members - any padding is left as is. Thus this code: struct foo_t foo; foo = bar; leaves the padding of foo intact, ie uninitialized random garbage. This patch fixes constant shader recompiles by initializing the struct to zero. For completeness, memcpy is used to copy the key to the shader struct. NOTE: This is a candidate for the stable branches. Signed-off-by: Lauri Kasanen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Andreas Boll <[email protected]>
* scons: remove radeon buildAndreas Boll2013-05-031-18/+0
| | | | | | | | One build system for linux/unix only drivers should be enough. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48694 Acked-by: Jose Fonseca <[email protected]>
* r600g: don't emit surface_sync after FLUSH_AND_INV_EVENTAlex Deucher2013-05-031-26/+0
| | | | | | | | | | | | | | | | | It shouldn't be needed since the FLUSH_AND_INV_EVENT has already made sure the destination caches are flushed. Additionally, we didn't previously emit the surface_sync until this commit: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5e4c07e7964a3258ed02b530bcdc24c0650204b Emitting them together causes hangs in compute on cayman/TN and hangs in Heaven on evergreen. Note: this patch is a candidate for the 9.1 branch, but requires: http://cgit.freedesktop.org/mesa/mesa/commit/?id=156bcca62c9f4e79e78929f72bc085757f36a65a as well. Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* r600g/sb: zero-initialize bytecode structsVadim Girlin2013-05-032-3/+6
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix constant propagation in gvn passVadim Girlin2013-05-031-1/+2
| | | | | | Fixes the bug that prevented propagation of literals in some cases. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: don't run unnecessary passesVadim Girlin2013-05-031-3/+0
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: silence warnings with gcc 4.8Vadim Girlin2013-05-032-14/+15
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix handling of interference sets in post_schedulerVadim Girlin2013-05-032-8/+8
| | | | | | | | | | | post_scheduler clears interference set for reallocatable values when the value becomes live first time, and then updates it to take into account modified order of operations, but this was not handled properly if the value appears first time as a source in copy operation. Fixes issues with webgl demo: http://madebyevan.com/webgl-water/ Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix allocation of indirectly addressed input arraysVadim Girlin2013-05-034-10/+25
| | | | | | | | | Some inputs may be preloaded into predefined GPRs, so we can't reallocate arrays with such inputs. Fixes issues with webgl demo: http://oos.moxiecode.com/js_webgl/snake/ Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: use hex instead of binary constantsVadim Girlin2013-05-035-15/+15
| | | | | | This should fix build issues with GCC < 4.3 Signed-off-by: Vadim Girlin <[email protected]>
* r600g: use old shader disassembler by defaultVadim Girlin2013-05-034-19/+18
| | | | | | | | | | | | | | New disassembler is not completely isolated yet from further processing in r600g/sb that is not required for printing the dump, so it has higher probability to fail in case of any unexpected features in the bytecode. This patch adds "sbdisasm" flag for R600_DEBUG that allows to use new disassembler in r600g/sb for shader dumps when shader optimization is not enabled. If shader optimization is enabled, new disassembler is used by default. Signed-off-by: Vadim Girlin <[email protected]>
* radeon/uvd: enable interlaced buffers by defaultChristian König2013-05-031-3/+3
| | | | | | Kills tilling on UVD buffers, but we currently don't really need that. Signed-off-by: Christian König <[email protected]>
* vl/idct: fix for commit 7d2f2a0c890b1993532a45c8c392c28950ddc06eChristian König2013-05-031-3/+3
| | | | | | | | We still need the option for handling 3D textures as well. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=64143 Signed-off-by: Christian König <[email protected]>
* vl/buffers: fix typo in function nameChristian König2013-05-031-3/+3
| | | | Signed-off-by: Christian König <[email protected]>
* r600g: Don't set the dest cache bits on surface sync for ↵Tom Stellard2013-05-021-15/+13
| | | | | | | | | | | | | R600_CONTEXT_FLUSH_AND_INV We are already emitting a EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT packet when this flush flag is set, so flushing the dest caches with a SURFACE_SYNC should not be necessary. The motivation for this change is that emitting a SURFACE_SYNC packet with the CB bits set was causing compute shaders to hang on Cayman. Reviewed-by: Alex Deucher <[email protected]>
* r600g/compute: Fix build error in debug codeTom Stellard2013-05-021-1/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600/sb: Fix build failure with non-standard libdrm installation prefixLauri Kasanen2013-05-021-0/+1
| | | | | | Just like radeon/uvd, r600/sb fails to find the libdrm includes. Signed-off-by: Lauri Kasanen <[email protected]>
* vl/buffer: use 2D_ARRAY instead of 3D texturesChristian König2013-05-011-7/+7
| | | | Signed-off-by: Christian König <[email protected]>
* r600g/sb: remove unused codeVadim Girlin2013-04-302-34/+0
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: collect shader statisticsVadim Girlin2013-04-305-8/+162
| | | | | | | | | Collects various statistical information for each shader and total stats for contexts. Printed with R600_DEBUG=sb,sbstat Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: don't propagate dead values in GVN passVadim Girlin2013-04-301-0/+3
| | | | | | | | | | | | | | In some cases we use value::gvn_source field to link values that are known to be equal before gvn pass (e.g. results of DOT4 in different slots of the same alu group), but then source value may become dead later and this confuses further passes. This patch resets value::gvn_source to NULL in the dce_cleanup pass if it points to dead value. Fixes segfault during shader optimization with ETQW. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: use simple heuristic to limit register pressureVadim Girlin2013-04-302-3/+33
| | | | | | | | | | | | | | | | | | | | | It's not a complete register pressure tracking, yet it helps to prevent register allocation problems in some cases where they were observed. The problems are uncovered by false dependencies between fetch instructions introduced by some recent changes in TGSI and/or default backend. Sometimes we have code like this: ... SAMPLE R5.xyzw, R5.xyzw ... store R5.xyzw somewhere MOV R5.x, <next x coord> MOV R5.y, <next y coord> SAMPLE R5.xyzw, R5.xyzw ... <may be repeated a lot of times> With 2D resources, z and w in SAMPLE src reg aren't used and can be simply masked, but shader backend doesn't have this information, so it's considered as data dependency by optimization algorithms.
* r600g/sb: improve error checking in ra_coalesce passVadim Girlin2013-04-302-14/+27
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* r600g/sb: use source bytecode in case of optimization errorsVadim Girlin2013-04-305-11/+25
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* r600g: plug in optimizing backendVadim Girlin2013-04-308-3/+155
| | | | | | Optimization is enabled with "R600_DEBUG=sb". Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: initial commit of the optimizing shader backendVadim Girlin2013-04-3035-0/+17498
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* r600g: use enum type for domains field in struct r600_resourceVadim Girlin2013-04-301-1/+1
| | | | This prevents the problems when the header is included in C++ code.
* r600g: add new flags to isa instruction tablesVadim Girlin2013-04-301-116/+127
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* r600g: always create reverse lookup isa tablesVadim Girlin2013-04-301-10/+2
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* r600g: mask unused source components for SAMPLEVadim Girlin2013-04-301-0/+20
| | | | | | | | This results in more clean shader code and may improve the quality of optimized code produced by r600-sb due to eliminated false dependencies in some cases. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/llvm: Fix opencl buildVincent Lejeune2013-04-301-1/+1
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* r600g/llvm: get use_kill from compiler shaderVincent Lejeune2013-04-303-1/+8
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* r600g: force full cache for hyperzJerome Glisse2013-04-292-0/+2
| | | | | | | | | | | | | | | | | Seems that in some case allowing half cache usage confuse the gpu and trigger lockup. Force full cache use. Should fix : https://bugs.freedesktop.org/show_bug.cgi?id=59592 https://bugs.freedesktop.org/show_bug.cgi?id=60848 https://bugs.freedesktop.org/show_bug.cgi?id=60969 https://bugs.freedesktop.org/show_bug.cgi?id=61747 https://bugs.freedesktop.org/show_bug.cgi?id=62466 https://bugs.freedesktop.org/show_bug.cgi?id=62669 https://bugs.freedesktop.org/show_bug.cgi?id=62721 https://bugs.freedesktop.org/show_bug.cgi?id=63124 Signed-off-by: Jerome Glisse <[email protected]>
* r600/uvd: stop advertising MPEG4 on UVD 2.x chips v2Christian König2013-04-263-1/+18
| | | | | | | | | That is just not supported by the hardware. v2: fix compare Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
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