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* r600g/llvm: Fix buildTom Stellard2013-03-111-1/+1
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* r600g: add debug options disabling various copy-buffer-related featuresMarek Olšák2013-03-113-2/+11
| | | | This will be invaluable for debugging and bug reports.
* r600g: allocate FMASK right after the texture, so that it's aligned with itMarek Olšák2013-03-111-1/+1
| | | | | | This avoids the kernel CS checker errors with MSAA textures. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove r600.h, move the stuff elsewhere (mostly to r600_pipe.h)Marek Olšák2013-03-118-167/+126
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove r600_hw_context_priv.h, move the stuff to r600_pipe.hMarek Olšák2013-03-116-46/+13
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove deprecated state management codeMarek Olšák2013-03-1110-560/+2
| | | | | | It's nice to see so much code that did pretty much nothing go away. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: atomize pixel shaderMarek Olšák2013-03-117-207/+83
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: atomize vertex shaderMarek Olšák2013-03-118-232/+203
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: inline r600_pipe_shader functionMarek Olšák2013-03-115-58/+51
| | | | | | also change names of other functions, so that they make sense Reviewed-by: Jerome Glisse <[email protected]>
* r600g: dump vertex elements state along with the fetch shaderMarek Olšák2013-03-111-0/+8
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* r600g: remove bytecode dumpingMarek Olšák2013-03-112-240/+0
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g: use a single env var R600_DEBUG, disable bytecode dumpingMarek Olšák2013-03-1110-95/+122
| | | | | | | | | | | | | | | | | | | | | | | | | Only the disassembler is used to dump shaders. Here's a few examples how to use R600_DEBUG. Log compute info: R600_DEBUG=compute Dump all shaders: R600_DEBUG=fs,vs,gs,ps,cs Dump pixel shaders only: R600_DEBUG=ps Disable Hyper-Z: R600_DEBUG=nohyperz Disable the LLVM backend: R600_DEBUG=nollvm Or use any combination of the above, or print all options: R600_DEBUG=help Reviewed-by: Tom Stellard <[email protected]>
* r600g: cleanup #include recursion between r600_pipe.h and evergreen_compute.hMarek Olšák2013-03-117-2/+6
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g: don't check for R600_ENABLE_S3TC env varMarek Olšák2013-03-111-10/+3
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* radeon/llvm: make SGPRs proper function arguments v2Christian König2013-03-071-0/+1
| | | | | | | v2: remove unrelated changes Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g/llvm: Update CONSTANT_BUFFER address space definitionChristian König2013-03-071-1/+1
| | | | | | To match recent LLVM changes. Signed-off-by: Christian König <[email protected]>
* r600g: Check comp_mask before merging export instructionsVincent Lejeune2013-03-031-0/+1
| | | | | Fixes a llvm uncovered (rare) bug where consecutive exports were merged even if they have incompatible mask.
* r600g: fix check_and_set_bank_swizzle for caymanVadim Girlin2013-03-031-7/+3
| | | | | Tested-by: Vincent Lejeune <vljn at ovi.com> Reviewed-by: Vincent Lejeune <vljn at ovi.com>
* r600g: enable CP DMA on 6xxAlex Deucher2013-03-011-1/+1
| | | | | | Tested across several 6xx parts, no piglit regressions. Signed-off-by: Alex Deucher <[email protected]>
* r600g: don't require dword alignment with CP DMA for buffer transfersMarek Olšák2013-03-015-11/+9
| | | | | | which is a leftover from the days when we used streamout to copy buffers Tested-by: Andreas Boll <[email protected]>
* r600g: always map uninitialized buffer range as unsynchronizedMarek Olšák2013-03-016-0/+45
| | | | | | | | | | Any driver can implement this simple and efficient optimization. Team Fortress 2 hits it always. The DISCARD_RANGE codepath is not even used with TF2 anymore, so we avoid a ton of useless buffer copies. Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: cleanup deprecated register tablesMarek Olšák2013-03-013-45/+14
| | | | | | These registers are either already emitted elsewhere or moved to start_cs. Tested-by: Andreas Boll <[email protected]>
* r600g: unify vgt statesMarek Olšák2013-03-015-26/+9
| | | | | | | The states were split because we thought it caused a hardlock. Now we know the hardlock was caused by something else and has since been fixed. Tested-by: Andreas Boll <[email protected]>
* r600g: flush and invalidate htile cache when appropriateMarek Olšák2013-03-016-1/+21
| | | | | | Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: atomize streamout enablingMarek Olšák2013-03-019-87/+96
| | | | | | | | | | | | This doesn't fix any issue we know of, but there indeed is a week spot in draw_vbo where streamout can fail. After streamout is enabled, the need_cs_space call can flush the context, which causes the streamout to be disabled right after it was enabled and bad things happen. One way to fix it is to atomize the beginning part, so that no context flush can happen between streamout enabling and the first drawing. Tested-by: Andreas Boll <[email protected]>
* r600g: use async DMA with a non-zero src offsetMarek Olšák2013-03-011-1/+1
| | | | | | | | probably a typo Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: pad the DMA CS to a multiple of 8 dwordsMarek Olšák2013-03-011-2/+14
| | | | | | Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: workaround hyperz lockup on evergreenJerome Glisse2013-02-284-2/+23
| | | | | | | | | | | This work around disable hyperz if write to zbuffer is disabled. Somehow using hyperz when not writting to the zbuffer trigger GPU lockup. See : https://bugs.freedesktop.org/show_bug.cgi?id=60848 Candidate for 9.1 Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add missing emit_flush for R600_CONTEXT_FLUSH_AND_INV caseAlex Deucher2013-02-261-0/+1
| | | | | | | | We set the cp_coher_cntl bits but never emit them. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: synchronize streamout buffers on r6xx too (v3)Alex Deucher2013-02-261-1/+1
| | | | | | | | | | | Streamout buffers need to be synchronized on r6xx as well. v2: Add DEST flush as well. v3: drop DEST flush Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: add helper util_max_layer from r600gMarek Olšák2013-02-263-25/+9
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* r600g: fixup PS_PARTIAL_FLUSH flag handling for caymanAlex Deucher2013-02-221-7/+6
| | | | | | | | | So we don't emit it twice if we ever use the flag on cayman. Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: r6xx deadlock workaround (v6)Alex Deucher2013-02-221-0/+6
| | | | | | | | | | | | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=50655 https://bugs.freedesktop.org/show_bug.cgi?id=47116 v2: flush along with workaround. v3: just need a flush v4: try WAIT_UNTIL v5: switch to PS partial flush v6: rework patch Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: add PS_PARTIAL_FLUSH flagAlex Deucher2013-02-222-0/+6
| | | | | | | | | PS_PARTIAL flushes seems to be required in certain cases to prevent hangs, especially on r6xx. Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: fix random corruption with CP DMA in TF2Marek Olšák2013-02-221-0/+3
| | | | NOTE: This is a candidate for the 9.1 branch.
* r600g: Fix memory leak in r600_shader_select.Vinson Lee2013-02-211-0/+1
| | | | | | Signed-off-by: Vinson Lee <[email protected]> Reported-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: don't enable ReZ mode on evergreenAlex Deucher2013-02-211-1/+4
| | | | | | | | | | | | | | | Can cause lockups in certain cases when zfunc/zenable/zwrite change without a flush in between. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=60969 and lockups on Civ4 with wine. This is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/Cayman: Fix blending using destination alpha factor but non-alpha destMichel Dänzer2013-02-201-4/+9
| | | | | | | | Only compile tested, but should fix at least some piglit fbo-blending tests. NOTE: This is a candidate for the stable branches. Reviewed-by: Marek Olšák <[email protected]>
* radeon/llvm: Fix build with LLVM 3.3Tom Stellard2013-02-191-0/+4
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* r600g: Add $(DEFINES) to AM_CXXFLAGSTom Stellard2013-02-191-1/+2
| | | | This way llvm_wrapper.cpp is compiled with -DHAVE_LLVM=0x....
* r600g/llvm: Support for TBOVincent Lejeune2013-02-181-0/+28
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g/llvm: Fix alpha_to_one piglit testsVincent Lejeune2013-02-182-0/+3
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g/llvm: Add support for UBOVincent Lejeune2013-02-181-1/+5
| | | | | | NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g: add support for red-alpha render targetsMarek Olšák2013-02-142-0/+44
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* r600g: properly implement S8Z24 depth-stencil format for EvergreenMarek Olšák2013-02-143-18/+47
| | | | | | | | | | | | | | | | | | | | I should say "fix", but it has never been used until now. S8Z24 is the format equivalent to the GL_UNSIGNED_INT_24_8 packing, so we'll start to see it more often with st/mesa now making smart decisions about formats. The DB<->CB copy can change the channel ordering for transfers, other than that, the internal DB format doesn't really matter. R600-R700 support is possible except shadow mapping. FMT_24_8 is broken if the SAMPLE_C instruction is used (no idea why). Also the sampler swizzling was broken in theory and the fact it worked was a lucky coincidence. radeonsi might need to port this. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: fix lockup when hyperz & alpha test are enabled together. v3Jerome Glisse2013-02-123-3/+49
| | | | | | | | | | | | Seems that alpha test being enabled confuse the GPU on the order in which it should perform the Z testing. So force the order programmed throught db shader control. v2: Only force z order when alpha test is enabled v3: Update db shader when binding new dsa + spelling fix Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: make sure async blit is done 8 * pitch at a time v2Jerome Glisse2013-02-111-6/+7
| | | | | | | | The blit must be aligned on 8 horizontal block. v2: no need to align the reminder Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix slice tile max for compressed texture and async dmaJerome Glisse2013-02-072-4/+8
| | | | | | | Was using the pixel size instead of the number of block for the slice tile max computation which resulted in dma writing at wrong address. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: use new RGBX formatsMarek Olšák2013-02-072-0/+52
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* r600g: report correct control flow depthMarek Olšák2013-02-061-2/+1
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