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* r600g: call cayman_emit_msaa_sample_locs only when neededNicolai Hähnle2016-07-081-1/+2
| | | | | | In the case of nr_samples <= 1, that function is (currently) a no-op anyway. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: replace is_flushing_texture with db_compatibleNicolai Hähnle2016-07-064-11/+13
| | | | | | | | | | | This is a left-over of when I considered generalizing the separate stencil support. I do prefer the new name since it emphasizes what flushing vs. non-flushing means from a functional point-of-view, namely special handling of the texture format. v2: adjust r600_init_color_surface as well Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add can_sample_z/s flags for texturesNicolai Hähnle2016-07-063-20/+10
| | | | | | v2: adjust r600_init_color_surface as well Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add and use radeon_info::max_alloc_size (v2)Marek Olšák2016-07-051-2/+2
| | | | | | | | | | v2: - squashed the patches - use INT_MAX - clamp max_const_buffer_size - check the DRM version in radeon Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Vedran Miletić <[email protected]>
* gallium/radeon: remove unused code - radeon_llvm_util.*Marek Olšák2016-07-051-3/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: Add double precision FMA opsJan Vesely2016-07-051-0/+2
| | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96782 Fixes: 54c4d525da7c7fc1e103d7a3e6db015abb132d5d ("r600g: Enable FMA on chips that support it") Signed-off-by: Jan Vesely <[email protected]> Tested-by: James Harvey <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600: fix duplicate 'const' declarationFrancesco Ansanelli2016-07-041-1/+1
| | | | Signed-off-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add and use r600_texture_referenceMarek Olšák2016-06-291-1/+1
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use r600_resource_referenceMarek Olšák2016-06-254-14/+10
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2016-06-255-36/+46
| | | | | | | | | | | | | | | | Empirical tests show that the polygon offset behaviour is entirely determined by the content of the PA_SU_POLY_OFFSET states, and not by the depth buffer format bound. PA_SU_POLY_OFFSET seems to directly set the parameters of the polygon offset formula, and setting 0 for PA_SU_POLY_OFFSET_DB_FMT_CNTL (ie setting the unorm depth bias behaviour with a scale of 2^0 = 1.0f) gives the unscaled behaviour. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for evergreenAxel Davy2016-06-251-25/+13
| | | | | | | | | | | Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with the other poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. v2: Increase the num_dw field for the poly offset atom Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for r600Axel Davy2016-06-251-24/+13
| | | | | | | | | | | Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with the other poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. v2: Increase the num_dw field for the poly offset atom Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add a cap for offset_units_unscaledAxel Davy2016-06-251-0/+1
| | | | | | | | | | | | | | D3D9 has a different behaviour for depth bias. For OGL/D3D1X, the depth bias unit is the minimal resolvable value for the depth buffer, which depends on the format (and has different behaviour for float depth buffers). For D3D9, the depth bias unit is 1.0f. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: let drivers specify SC_MODE_CNTL_1 fieldsMarek Olšák2016-06-241-1/+6
| | | | | | radeonsi will set more fields Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: disable complicated point clipping against user clip planesMarek Olšák2016-06-242-2/+0
| | | | | | Nothing in the GL spec says that we should expand points to triangles. Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: Enable FMA on chips that support itJan Vesely2016-06-242-5/+7
| | | | | | | | | | v2: Merge with PIPE_SHADER_CAP_DOUBLES Add CHIP_HEMLOCK v3: only set the instruction on EG and CM Signed-off-by: Jan Vesely <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium: make constant_buffer constRob Clark2016-06-201-1/+1
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all driversIlia Mirkin2016-06-181-0/+1
| | | | | | | | This says how many window rectangles are supported by the implementation, although it may not exceed PIPE_MAX_WINDOW_RECTANGLES. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* Android: move libdrm settings to top-level Android.common.mkRob Herring2016-06-131-1/+1
| | | | | | | | | | | | | | Fix warnings like these due to HAVE_LIBDRM being inconsistently defined: external/libdrm/include/drm/drm.h:839:30: warning: redefinition of typedef 'drm_clip_rect_t' is a C11 feature [-Wtypedef-redefinition] typedef struct drm_clip_rect drm_clip_rect_t; HAVE_LIBDRM needs to be set project wide to fix this. This change also harmlessly links libdrm with everything, but simplifies the makefiles a bit. Signed-off-by: Rob Herring <[email protected]> Acked-by: Emil Velikov <[email protected]>
* gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowedIlia Mirkin2016-06-061-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* r600g: use hw MSAA resolve for non-trivial resolvesMarek Olšák2016-06-061-9/+53
| | | | | | This improves MSAA resolve performance. Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: don't flush caches when binding shader resourcesMarek Olšák2016-06-044-31/+26
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: only do necessary cache flushes in cp_dma_copy_bufferMarek Olšák2016-06-041-14/+1
| | | | | | | | | The main impact is that {upload, draw, upload, draw, ..} doesn't flush framebuffer caches before every upload. Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: only do necessary cache flushes in cp_dma_clear_bufferMarek Olšák2016-06-042-14/+18
| | | | | | | | The main impact is that fast color clear doesn't flush TC, CONST, DB. Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: remove a CP DMA workaround that's not needed anymoreMarek Olšák2016-06-041-6/+0
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: fix CP DMA hazard with index buffer fetches (v3)Marek Olšák2016-06-046-6/+92
| | | | | | | | | v3: use PFP_SYNC_ME on EG-CM only when supported by the kernel, otherwise use MEM_WRITE + WAIT_REG_MEM to emulate that Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: properly sync CP with CP DMA on R6xxMarek Olšák2016-06-041-1/+8
| | | | | | | | This will allow removing useless cache & IB flushes. Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: write WAIT_UNTIL in the correct placeMarek Olšák2016-06-041-8/+11
| | | | | | | | | | This has been wrong all along. Fixing this will allow removing useless cache flushes. Cc: 11.1 11.2 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/u_suballoc: allow different alignment for each allocationMarek Olšák2016-06-042-2/+3
| | | | | | | | | Just move the alignment parameter from u_suballocator_create to u_suballocator_alloc. Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeon/winsys: introduce radeon_winsys_cs_chunkNicolai Hähnle2016-06-012-6/+7
| | | | | | | We will chain multiple chunks together and will keep pointers to the older chunks to support IB dumping. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use cs_check_space throughoutNicolai Hähnle2016-06-011-4/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. u_blitter does the right thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: Add a pipe cap for whether primitive restart works for patches.Kenneth Graunke2016-05-231-0/+1
| | | | | | | | | | | | | | | Some hardware supports primitive restart on patch primitives, and other hardware does not. Modern GL and ES include a query for this feature; adding a capability bit will allow us to answer it. As far as I know, AMD hardware does not support this feature, while NVIDIA and Intel hardware does. However, most Gallium drivers do not appear to support tessellation shaders yet. So, I've enabled it for nvc0 and disabled it everywhere else. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: Change default behaviour for undefined COLOR0Axel Davy2016-05-181-0/+4
| | | | | | | | | d3d 9 needs COLOR0 to be 1.0 on all channels when undefined. 0.0 for the others is fine. GL behaviour is undefined. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600: Change default behaviour for undefined COLOR0Axel Davy2016-05-181-0/+4
| | | | | | | | | d3d 9 needs COLOR0 to be 1.0 on all channels when undefined. 0.0 for the others is fine. GL behaviour is undefined. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add radeon_emitted to check for non-trivial IBsNicolai Hähnle2016-05-173-6/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use radeon_emit_arrayNicolai Hähnle2016-05-171-2/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use radeon_emitNicolai Hähnle2016-05-176-108/+108
| | | | | | | Mostly generated using a sed-script, with manual fix-up for multi-line statements. Reviewed-by: Marek Olšák <[email protected]>
* Treewide: Remove Elements() macroJan Vesely2016-05-174-15/+15
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* r600g,sb: Don't use standard macro nameJan Vesely2016-05-175-11/+11
| | | | Signed-off-by: Jan Vesely <[email protected]>
* gallium: Add a pipe cap for arb_cull_distanceTobias Klausmann2016-05-141-0/+1
| | | | | | | | | This lets us safely enable or disable the extension as needed Signed-off-by: Tobias Klausmann <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: remove TABLE_SIZE macroNicolai Hähnle2016-05-132-4/+2
| | | | | | | Use ARRAY_SIZE instead. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: move alu_op_table to .c fileNicolai Hähnle2016-05-133-277/+291
| | | | | | | | So that it gets compiled and emitted only once, saving space is the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: move cf_op_table to .c fileNicolai Hähnle2016-05-132-108/+111
| | | | | | | | So that it gets compiled and emitted only once, saving space is the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: move fetch_op_table to .c fileNicolai Hähnle2016-05-132-118/+121
| | | | | | | | So that it gets compiled and emitted only once, saving space is the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: protect r600_isa.h with extern "C"Nicolai Hähnle2016-05-131-0/+8
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: flush if DMA IB memory usage is too highMarek Olšák2016-05-104-4/+4
| | | | | | | | This prevents IB rejections due to insane memory usage from many concecutive texture uploads. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix (S)DMA read-after-write hazardsMarek Olšák2016-05-104-0/+4
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: implement randomized SDMA texture copy testing (v2)Marek Olšák2016-05-101-0/+3
| | | | | | | | | | | v2: - adjustments for exercising all important SDMA code paths - decrease the probability of getting huge sizes (faster testing) - increase the probability of getting power-of-two dimensions - change the memory cap to 128MB (faster testing) - better detect which engine has been used Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use a common function for DMA blit preparationMarek Olšák2016-05-102-9/+6
| | | | | | | this is more robust and probably fixes some bugs already Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
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