summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/r600
Commit message (Collapse)AuthorAgeFilesLines
* r600g: check if hardware blits are possible bevore enabling tillingChristian König2011-01-211-41/+40
|
* r600g: FLT_TO_INT_FLOOR is trans instructionAlex Deucher2011-01-211-0/+1
| | | | Add missing evergreen FLT_TO_INT_FLOOR instruction.
* r600g: fix segfault if texture operand is a literalChristian König2011-01-191-1/+3
| | | | This fixes Bug 33262
* r600g: fix reserve_cfile for R700+Christian König2011-01-191-19/+17
| | | | | | According to R700 ISA we have only two channels for cfile constants. This patch makes piglit tests "glsl1-constant array with constant indexing" happy on RV710.
* r600g: Kill trailing whitespace.Henri Verbeet2011-01-185-25/+25
|
* r600g: Remove the unused eg_states_inc.h and r600_states_inc.h.Henri Verbeet2011-01-182-1001/+0
|
* r600g: Simplify some r600_bc_add_alu_type() calls to r600_bc_add_alu().Henri Verbeet2011-01-181-3/+3
|
* r600g: fix PIPE_CAP_INSTANCED_DRAWING warningChristian König2011-01-161-0/+1
|
* r600g: fix alu inst group merging for relative adressingChristian König2011-01-161-1/+13
|
* r600d: fix some bugs added reworking literal handlingChristian König2011-01-162-22/+33
| | | | | | | | If a literal slot isn't used it should be set to 0 instead of an uninitialized value. Also the channels for pre R700 trig functions were incorrect. And most important literals were not counted against ndw, resulting in an invalid force_add_cf detection.
* r600g: Fix some register value name typos.Henri Verbeet2011-01-154-6/+6
| | | | SFR -> SRF.
* r600g: Get rid of r600_translate_vertex_data_type().Henri Verbeet2011-01-152-270/+0
| | | | This has been replaced with r600_vertex_data_type().
* r600g: compiler helper opcode fixes for evergreenAlex Deucher2011-01-142-120/+269
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: pass r600_bc to some addition compiler helper functionsAlex Deucher2011-01-141-55/+62
| | | | | | needed for asic specific opcodes Signed-off-by: Alex Deucher <[email protected]>
* r600g: Disable V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR case.Vinson Lee2011-01-141-0/+2
| | | | | | The usage of macro V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR was introduced by commit 323ef3a1f07ba4333dadebab571ddcd49d95f45c but the macro is undefined. Disable this case to fix the build for now.
* r600g: add more missing instructions to r600_bc_get_num_operandsChristian König2011-01-141-1/+5
|
* r600g: Move declaration before code in r600_asm.c.Vinson Lee2011-01-131-1/+3
| | | | Fixes SCons build.
* r600g: rework literal handlingChristian König2011-01-135-277/+151
|
* r600g: merge alu groupsChristian König2011-01-132-37/+150
|
* r600g: implement replacing gpr with pv and psChristian König2011-01-133-5/+63
|
* r600g: add missing RECIPSQRT_CLAMPED to r600_bc_get_num_operandsChristian König2011-01-131-0/+1
|
* r600g: rework bank swizzle codeChristian König2011-01-132-183/+174
|
* r600g: fix alu slot assignmentChristian König2011-01-131-15/+167
|
* r600g: optimize away CF ALU instructions even if type doesn't matchChristian König2011-01-131-3/+16
|
* r600g: Silence uninitialized variable warnings.Vinson Lee2011-01-131-4/+4
|
* r600g: also look at tex inst when for maximum gpu countChristian König2011-01-121-1/+7
|
* r600g: implement output modifiers and use them to further optimize LRPChristian König2011-01-124-0/+33
|
* r600g: use special constants for 0, 1, -1, 1.0f, 0.5f etcChristian König2011-01-121-12/+44
|
* r600g: optimize temp register handling for LRPChristian König2011-01-121-34/+38
|
* r600g: optimize away CF_INST_POPChristian König2011-01-123-3/+29
| | | | | If last instruction is an CF_INST_ALU we don't need to emit an additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
* r600g: make dumping of shaders an optionChristian König2011-01-121-4/+14
|
* r600g: fix alu dumpingChristian König2011-01-121-19/+13
|
* r600g: improve r600_bc_dumpChristian König2011-01-121-28/+131
|
* r600g: texture instructions also work fine with TGSI_FILE_INPUTChristian König2011-01-121-1/+3
|
* r600g: DP4 also supports writemaskingChristian König2011-01-121-8/+6
|
* r600g: Why all this fiddling with tgsi_helper_copy?Christian König2011-01-121-21/+41
| | | | | | | | tgsi_helper_copy is used on several occasions to copy a temporary result into the real destination register to emulate writemasks for OP3 and reduction operations. According to R600 ISA that's unnecessary. This patch fixes this use for MAD, CMP and DP4.
* r600g: fix tex and vtx joiningChristian König2011-01-121-2/+2
|
* r600g: Fixed SIN/COS/SCS for the case where the operand is a literal.Tilman Sauerbeck2011-01-111-2/+15
| | | | | Signed-off-by: Tilman Sauerbeck <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: move user fence into base radeon structureJerome Glisse2011-01-111-3/+0
| | | | | | | This avoid any issue when context is free and we still try to access fence through radeon structure. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: Also set const_offset if the buffer is not a user buffer in ↵Henri Verbeet2011-01-071-0/+2
| | | | r600_upload_const_buffer().
* r600g: Update some comments for Evergreen.Henri Verbeet2011-01-071-1/+3
|
* r600g: Split ALU clauses based on used constant cache lines.Henri Verbeet2011-01-072-21/+129
|
* r600g: Consistently use the copy of the alu instruction in ↵Henri Verbeet2011-01-071-9/+9
| | | | r600_bc_add_alu_type().
* r600g: Store kcache settings as an array.Henri Verbeet2011-01-073-24/+25
|
* r600g: allow constant buffers to be user buffers.Dave Airlie2011-01-076-4/+44
| | | | | | | | | This provides an upload facility for the constant buffers since Marek's constants in user buffers changes. gears at least work on my evergreen now. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add support for NI (Northern Islands) GPUsAlex Deucher2011-01-064-0/+76
| | | | This adds support for Barts, Turks, and Caicos asics.
* r600g: support up to 64 shader constantsAlex Deucher2011-01-042-1/+20
| | | | | | | | | | | | | | | | | | | From the r600 ISA: Each ALU clause can lock up to four sets of constants into the constant cache. Each set (one cache line) is 16 128-bit constants. These are split into two groups. Each group can be from a different constant buffer (out of 16 buffers). Each group of two constants consists of either [Line] and [Line+1] or [line + loop_ctr] and [line + loop_ctr +1]. For supporting more than 64 constants, we need to break the code into multiple ALU clauses based on what sets of constants are needed in that clause. Note: This is a candidate for the 7.10 branch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: r600_blit_uncompress_depth() can't fail.Henri Verbeet2010-12-242-5/+2
|
* r600g: Get rid of r600_blit_uncompress_depth_ptr.Henri Verbeet2010-12-243-6/+1
|
* r600g: hack around property unknown issues.Dave Airlie2010-12-241-0/+2
| | | | | | | | should fix https://bugs.freedesktop.org/show_bug.cgi?id=32619 Need to add proper support for properties later. Signed-off-by: Dave Airlie <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 09:44:41 +0000