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* r600g: constify r600_shader_tgsi_instruction lists.Emil Velikov2015-03-171-5/+5
| | | | | | | Massive list of constant data. Annotate it as such. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: kill off r600_shader_tgsi_instruction::{tgsi_opcode,is_op3}Emil Velikov2015-03-171-591/+589
| | | | | | | | Both of which are no longer used. Use designated initializer to make things obvious as people add/remove TGSI_OPCODEs. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: use the tgsi opcode from parse.FullToken.FullInstructionEmil Velikov2015-03-171-5/+8
| | | | | | | | | ... rather than the local one in inst_info->tgsi_opcode. This will allow us to simplify struct r600_shader_tgsi_instruction. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add basic code for overrasterizationMarek Olšák2015-03-161-1/+1
| | | | | | | This will be used for line and polygon smoothing. This is GCN-only even though it's in shared code. Reviewed-by: Michel Dänzer <[email protected]>
* gallium: add FMA and DFMA opcodes (v3)Marek Olšák2015-03-162-3/+4
| | | | | | | | | Needed by ARB_gpu_shader5. v2: select DMAD for FMA with double precision v3: add and select DFMA Reviewed-by: Ilia Mirkin <[email protected]>
* r600g: Use R600_MAX_VIEWPORTS instead of 16Alexandre Demers2015-03-095-12/+14
| | | | | | | | | | | Lets define R600_MAX_VIEWPORTS instead of using 16 here and there in the code when looping through viewports and scissors. It is easier to understand what this number represents. v2: Missed a case where R600_MAX_VIEWPORTS should have been used. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* Fix invalid extern "C" around header inclusion.Mark Janes2015-03-055-6/+24
| | | | | | | | | | | System headers may contain C++ declarations, which cannot be given C linkage. For this reason, include statements should never occur inside extern "C". This patch moves the C linkage statements to enclose only the declarations within a single header. Reviewed-by: Jose Fonseca <[email protected]>
* r600g,radeonsi: cleanup of hex literalsMarek Olšák2015-02-243-16/+16
| | | | | | | | 0x3F800000 -> fui(1.0) 0x00000000 -> 0 Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: Implement GL_ARB_draw_indirect for EG/CMGlenn Kennard2015-02-2410-35/+129
| | | | | | | | | | | | | | | | Requires Evergreen/Cayman and radeon kernel module 2.41.0 or newer. Expected piglit fails due to hardware limitations: * arb_draw_indirect-draw-arrays-prim-restart Restarts not applied for DrawArrays commands * arb_draw_indirect-vertexid Base vertex offset is not included in vertex id Marek: bump vgt_state num_dw by 3 (= space needed for one register write) Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600: Fix build after 984f3069370cd4a347cb38269d430b428385affdEric Anholt2015-02-241-1/+1
| | | | | Same as for the CLAMP macro, undef it before including a header file that tries to make fields with that name.
* gallium: add shader cap for dldexp/dfracexp supportIlia Mirkin2015-02-191-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add a cap to enable double rounding opcodesIlia Mirkin2015-02-191-0/+2
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* r600g/sb: treat undefined values like constantsDave Airlie2015-02-181-2/+2
| | | | | | | | | | | | When we schedule an instructions with undefined value, we eventually will use 0, which is a constant, however sb wasn't taking this into account and creating ops with illegal scalar swizzles. this replaces my fix for op3 in t slots. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g,radeonsi: implement GL_AMD_pinned_memoryMarek Olšák2015-02-171-0/+3
| | | | | | v2: update release notes Reviewed-by: Christian König <[email protected]>
* r600g/sb: fix a bug in constants folding optimisation passXavier Bouchoux2015-02-061-0/+2
| | | | | | | | | | | | | | | ADD R6.y.1, R5.w.1, ~1|3f800000 ADD R6.y.2, |R6.y.1|, -0.0001|b8d1b717 was wrongly being converted to ADD R6.y.1, R5.w.1, ~1|3f800000 ADD R6.y.2, R5.w.1, -1.0001|bf800347 because abs() modifier was ignored. Signed-off-by: Xavier Bouchoux <[email protected]> Reviewed-by: Glenn Kennard <[email protected]>
* r600g: fix abs() support on ALU 3 source operands instructionsXavier Bouchoux2015-02-063-7/+63
| | | | | | | | Since alu does not support abs() modifier on source operands, spill and apply the modifiers to a temp register when needed. Signed-off-by: Xavier Bouchoux <[email protected]> Reviewed-by: Glenn Kennard <[email protected]>
* gallium: Add MULTISAMPLE_Z_RESOLVE capAxel Davy2015-02-061-0/+2
| | | | | | | | | | | | | | | | Resolving a multisampled depth texture into a single sampled texture is supported on >= SM4.1 hw. It is possible some previous hw support it. The ability was tested on radeonsi and nvc0. Apparently is is also supported for radeon >= r700. This patch adds the MULTISAMPLE_Z_RESOLVE cap and add it to the drivers. It is advertised for drivers for which it is sure the ability is supported. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Axel Davy <[email protected]>
* gallium: add a cap to determine whether the driver supports offset_clampIlia Mirkin2015-02-021-0/+1
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Glenn Kennard <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* dir-locals.el: Don't set variables for non-programming modesNeil Roberts2015-02-021-1/+1
| | | | | | | | | | | | | | This limits the style changes to modes inherited from prog-mode. The main reason to do this is to avoid setting fill-column for people using Emacs to edit commit messages because 78 characters is too many to make it wrap properly in git log. Note that makefile-mode also inherits from prog-mode so the fill column should continue to apply there. v2: Apply to all the .dir-locals.el files, not just the one in the root directory. Acked-by: Michel Dänzer <[email protected]>
* r600g: add support for primitive id without geom shader (v2)Dave Airlie2015-01-286-1/+51
| | | | | | | | | | | | | | | | | | | GLSL 1.50 specifies a fragment shader may have a primitive id input without a geometry shader present. On r600 hw there is a special GS scenario for this, you have to enable GS_SCENARIO_A and pass the primitive id through the vertex shader which operates in GS_A mode. This is a first pass attempt at this, and passes the piglit tests that test for this. v1.1: clean up debug print + no need to assign key value to setup output. v2: add r600 support Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: move selecting the pixel shader earlier.Dave Airlie2015-01-281-3/+4
| | | | | | | | | | | In order to detect that a pixel shader has a prim id input when we have no geometry shader we need to reorder the shader selection so the pixel shader is selected first, then the vertex shader key can take into account the primitive id input requirement and lack of geom shader. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: only flush the right set of caches for CP DMA operationsMarek Olšák2015-01-071-1/+2
| | | | | | | | That's either framebuffer caches or caches for shader resources. The motivation is that framebuffer caches need to be flushed very rarely here. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: separate cache flush flagsMarek Olšák2015-01-071-0/+15
| | | | | | I will rename them for radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: move r6xx-specific streamout flush flagging into r600gMarek Olšák2015-01-071-3/+6
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Cache LLVMTargetMachine object in si_screenTom Stellard2015-01-061-1/+1
| | | | | | | | | | Rather than building a new one every compile. This should reduce some of the overhead of compiling shaders. One consequence of this change is that we lose the MachineInstrs dumps when dumping the shaders via R600_DEBUG. The LLVM IR and assembly is still dumped, and if you still want to see the MachineInstr dump, you can run the dumped LLVM IR through llc.
* gallium: add TGSI_SEMANTIC_VERTEXID_NOBASE and TGSI_SEMANTIC_BASEVERTEXRoland Scheidegger2014-12-161-0/+1
| | | | | | | | | | | | | | | | | | | Plus a new PIPE_CAP_VERTEXID_NOBASE query. The idea is that drivers not supporting vertex ids with base vertex offset applied (so, only support d3d10-style vertex ids) will get such a d3d10-style vertex id instead - with the caveat they'll also need to handle the basevertex system value too (this follows what core mesa already does). Additionally, this is also useful for other state trackers (for instance llvmpipe / draw right now implement the d3d10 behavior on purpose, but with different semantics it can just do both). Doesn't do anything yet. And fix up the docs wrt similar values. v2: incorporate feedback from Brian and others, better names, better docs. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/sb: implement r600 gpr index workaround. (v3.1)Dave Airlie2014-12-164-9/+57
| | | | | | | | | | | | | | | | | | | | | | | r600, rv610 and rv630 all have a bug in their GPR indexing and how the hw inserts access to PV. If the base index for the src is the same as the dst gpr in a previous group, then it will use PV instead of using the indexed gpr correctly. The workaround is to insert a NOP when you detect this. v2: add second part of fix detecting DST rel writes followed by same src base index reads. v3: forget adding stuff to structs, just iterate over the previous node group again, makes it more obvious. v3.1: drop local_nop. Fixes ~200 piglit regressions on rv635 since SB was introduced. Reviewed-By: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g/sb: fix issues with loops created for switchVadim Girlin2014-12-165-4/+16
| | | | Signed-off-by: Dave Airlie <[email protected]>
* Revert "r600g/sb: fix issues cause by GLSL switching to loops for switch"Dave Airlie2014-12-161-38/+12
| | | | | | This reverts commit 7b0067d23a6f64cf83c42e7f11b2cd4100c569fe. Vadim's patch fixes this a lot better.
* gallium: Remove Android files from distribution.Matt Turner2014-12-121-1/+1
| | | | Android builds Mesa from git, so there don't need to be in the tarball.
* r600g: only init GS_VERT_ITEMSIZE on r600Dave Airlie2014-12-101-5/+2
| | | | | | | | | | | | On evergreen there are 4 regs, on r600/700 there is only one. Don't initialise regs and trash someone elses state. Not sure this fixes anything, but hey one less stupid. Reviewed-By: Glenn Kennard <[email protected]> Cc: "10.3 10.4" [email protected] Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix regression since UCMP changeDave Airlie2014-12-091-1/+1
| | | | | | | | | | | | Since d8da6deceadf5e48201d848b7061dad17a5b7cac where the state tracker started using UCMP on cayman a number of tests regressed. this seems to be r600g is doing CNDGE_INT for UCMP which is >= 0, we should be doing CNDE_INT with reverse arguments. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* Remove useless checks for NULL before freeingMatt Turner2014-12-081-8/+4
| | | | | | | See commits 5067506e and b6109de3 for the Coccinelle script. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* r600, llvm: Don't leak global symbol offsetsJan Vesely2014-12-021-0/+1
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600, llvm: Fix mem leakJan Vesely2014-12-021-0/+1
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g/sb: fix issues cause by GLSL switching to loops for switchDave Airlie2014-12-021-12/+38
| | | | | | | | | | | | | | | | | | | Since 73dd50acf6d244979c2a657906aa56d3ac60d550 glsl: implement switch flow control using a loop The SB backend was falling over in an assert or crashing. Tracked this down to the loops having no repeats, but requiring a working break, initial code just called the loop handler for all non-if statements, but this caused a regression in tests/shaders/dead-code-break-interaction.shader_test. So I had to add further code to detect if all the departure nodes are empty and avoid generating an empty loop for that case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86089 Cc: "10.4" <[email protected]> Reviewed-By: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: make llvm code compile this timeDave Airlie2014-11-271-1/+1
| | | | | | | Actually compiling the code helps make it compile. Cc: "10.3 10.4" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix fallout from last patchDave Airlie2014-11-273-4/+1
| | | | | | | | | | | | | | | I accidentally rebased from the wrong machine and missed some fixes that were on my r600 box. doh. this fixes a bunch of geom shader textureSize tests on rv635 from gpu reset to pass. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86760 Reported-by: [email protected] Cc: "10.4 10.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: merge the TXQ and BUFFER constant buffers (v1.1)Dave Airlie2014-11-273-68/+61
| | | | | | | | | | | | | | | We are using 1 more buffer than we have, although in the future the driver should just end up using one buffer in total probably, this is a good first step, it merges the txq cube array and buffer info constants on r600 and evergreen. This should in theory fix geom shader tests on r600. v1.1: fix comments from Glenn. Reviewed-by: Glenn Kennard <[email protected]> Cc: "10.4 10.3" <[email protected] Signed-off-by: Dave Airlie <[email protected]>
* gallium: Drop the unused CND opcode.Eric Anholt2014-11-241-3/+3
| | | | | | Nothing in the tree generates it. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Drop unused BRA opcode.Eric Anholt2014-11-241-3/+3
| | | | | | Never generated, and implemented in only nvfx vertprog. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Drop the unused SFL/STR opcodes.Eric Anholt2014-11-241-6/+6
| | | | | | Nothing generated them. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Drop the unused RFL opcode.Eric Anholt2014-11-241-3/+3
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Drop unused X2D opcode.Eric Anholt2014-11-241-3/+3
| | | | | | Nothing in the tree generates it. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Drop the unused ARA opcode.Eric Anholt2014-11-241-3/+3
| | | | | | | | Nothing in the tree generated it. v2: Only drop ARA, not ARR as well. Reviewed-by: Jose Fonseca <[email protected]> (v2)
* gallium: Drop the unused RCC opcode.Eric Anholt2014-11-241-3/+3
| | | | | | Nothing in the tree generated it. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: Drop the NRM and NRM4 opcodes.Eric Anholt2014-11-241-6/+6
| | | | | | | They weren't generated in tree, and as far as I know all hardware had to lower it to a DP, RSQ, MUL. Reviewed-by: Jose Fonseca <[email protected]>
* r600: Drop the "/* gap */" notes.Eric Anholt2014-11-241-19/+0
| | | | | | | These are obviously the gaps already, due to the bare numbers with unsupported implementations. This makes inserting new gaps less irritating.
* r600g: do all CUBE ALU operations before gradient texture operations (v2.1)Dave Airlie2014-11-241-64/+72
| | | | | | | | | | | | | This moves all the CUBE section above the gradients section, so that the gradient emission happens on one block which is what sb/hardware expect. v2: avoid changes to bytecode by using spare temps v2.1: shame gcc, oh the shame. (uninit var warnings) Cc: "10.4 10.3" <[email protected]> Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: fix texture gradients instruction emission (v2)Dave Airlie2014-11-241-28/+31
| | | | | | | | | | | | | | | | | | | The piglit tests were failing, and it appeared to be SB optimising out things, but Glenn pointed out the gradients are meant to be clause local, so we should emit the texture instructions in the same clause. This moves things around to always copy to a temp and then emit the texture clauses for H/V. v2: Glenn pointed out we could get another ALU fetch in the wrong place, so load the src gpr earlier as well. Fixes at least: ./bin/tex-miplevel-selection textureGrad 2D Reviewed-by: Glenn Kennard <[email protected]> Cc: "10.4 10.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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