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path: root/src/gallium/drivers/r600/r700_asm.c
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* r600g: cleanup includesMarek Olšák2012-03-051-3/+0
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* r600g: fix the representation of control-flow instructionsMarek Olšák2011-11-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | We need something that looks like a compiler and not like some hacker put some functions together. /rant This is a band-aid for these two problems: - The R600 and EG control-flow instructions appear in switch statements next to each other, causing conflicts when adding new instructions. - The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29 to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST is 22:29. To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23, or 26 (directly in the definitions), such that it can be just or'd when making bytecode without any shifting. All switch statements have been divided into two, one for R600 and the other for EG. Of course, there is a better way to do this, but that is left for future work. Tested on RV730 and REDWOOD with no regressions. v2: minor cleanup as per Alex's comment. Reviewed-by: Alex Deucher <[email protected]>
* r600g: rename bc -> bytecodeMarek Olšák2011-08-161-2/+2
| | | | It took me a while to figure out what it stands for.
* r600g: split R600 and R700 CF generation for VTX and TEXChristian König2011-03-091-0/+9
| | | | Reviewed-by: Henri Verbeet <[email protected]>
* r600g: rework literal handlingChristian König2011-01-131-10/+0
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* r600g: implement output modifiers and use them to further optimize LRPChristian König2011-01-121-0/+1
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* r600g: delete old pathJerome Glisse2010-09-291-4/+3
| | | | | | Lot of clean can now happen. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix typo in r700 alu emitDave Airlie2010-09-241-1/+1
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* r600g: misc cleanupJohn Doe2010-09-151-1/+2
| | | | | | | Avoid using r600_screen structure to get ptr to radeon winsys structure. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add initial evergreen supportDave Airlie2010-09-101-0/+1
| | | | | | | | | | adds shader opcodes + assembler support (except ARL) uses constant buffers add interp instructions in fragment shader adds all evergreen hw states adds evergreen pm4 support. this runs gears for me on my evergreen
* r600g: add initial bank swizzle support.Dave Airlie2010-09-081-2/+2
| | | | | this is ported from r600c mostly, bank swizzling is real messy and I don't think I got enough sleep last night to fully understand it.
* r600g: add error print for no literals for r700s as wellDave Airlie2010-09-061-0/+3
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* r600g: fixup r700 assembler for clamp/relative addressingDave Airlie2010-09-061-13/+18
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* r600g: Remove unnecessary header.Vinson Lee2010-07-311-1/+0
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* r600g: drop compiler stuff and switch over dumb tgsi assemblerJerome Glisse2010-07-231-0/+70
Writing a compiler is time consuming and error prone in order to allow r600g to further progress in the meantime i wrote a simple tgsi assembler, it does stupid thing but i would rather keep the code simple than having people trying to optimize code it does. Signed-off-by: Jerome Glisse <[email protected]>
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