| Commit message (Collapse) | Author | Age | Files | Lines |
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We need to get the new gpu_address as well when
reallocating the cs buffer.
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=82428
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Kai Wasserbäch <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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This new bind flag forces linear storage, but does not have other
side effects like R600_RESOURCE_FLAG_TRANSFER.
Reviewed-by: Christian König <[email protected]>
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and the util_format_s3tc_init calls too.
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Move the code back into the common UVD files since we now
have base structures for R600 and radeonsi.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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This streamout state code will be used by radeonsi.
There are new structures r600_common_context and r600_common_screen.
What is inherited by what is shown here:
pipe_context -> r600_common_context -> r600_context
pipe_screen -> r600_common_screen -> r600_screen
The common structures reside in drivers/radeon. Currently they only contain
enough functionality to be able to handle streamout. Eventually I'd like
the whole pipe_screen implementation to be shared and some of the context
stuff too.
This is quite big, but most changes are because of the new structures and
the fact r600_write_value is replaced by radeon_emit.
Thanks to Tom Stellard for fixing the build for r600g/compute.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
Tested-by: Tom Stellard <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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UVD 2.x doesn't support hardware decoding of MPEG2, just use shader
based decoding for those chipsets.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66450
v2: fix interlacing as well
Signed-off-by: Christian König <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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Kills tilling on UVD buffers, but we currently don't really need that.
Signed-off-by: Christian König <[email protected]>
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We still need the option for handling 3D textures as well.
Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=64143
Signed-off-by: Christian König <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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That is just not supported by the hardware.
v2: fix compare
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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Signed-off-by: Christian König <[email protected]>
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Set transfer flag instead of fiddling with the tilling params directly.
Signed-off-by: Christian König <[email protected]>
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Just everything you need for UVD with r600g and radeonsi.
v2: move UVD code to radeon subdir, clean up build system additions,
remove an unused SI function, disable tiling on SI for now.
v3: some minor indentation fix and rebased
v4: dpb size calculation fixed
v5: implement proper fall-back in case the kernel doesn't support UVD,
based on patches from Andreas Boll but cleaned up a bit more.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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