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path: root/src/gallium/drivers/r600/r600_state2.c
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* r600g: cleanupJerome Glisse2010-09-291-2507/+0
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: use a hash table instead of groupJerome Glisse2010-09-291-204/+204
| | | | | | | | Instead of creating group of register use a hash table to lookup into which block each register belongs. This simplify code a bit. Signed-off-by: Jerome Glisse <[email protected]
* r600g: remove old assert from new codepathDave Airlie2010-09-291-2/+0
| | | | this fixes draw-elements-base-vertex
* r600g: add back evergreen name.Dave Airlie2010-09-291-1/+3
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* r600g: Cleaned up index buffer reference handling in the draw module.Tilman Sauerbeck2010-09-281-2/+7
| | | | | | This fixes a buffer leak. Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: avoid rebuilding the vertex shader if no change to input formatJerome Glisse2010-09-281-0/+4
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: suspend/resume occlusion query around clear/copyJerome Glisse2010-09-281-0/+8
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix remaining piglit issue in new designJerome Glisse2010-09-281-4/+16
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: use ptr for blit depth uncompress functionJerome Glisse2010-09-281-0/+42
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix routing btw vertex & pixel shaderJerome Glisse2010-09-271-1/+15
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix pointsprite & resource unbindingJerome Glisse2010-09-271-1/+2
| | | | | | | | | | When asking to bind NULL resource assume it's unbinding so free resource and unreference assoicated buffer. Also fix pointsprite parameter. Fix glsl-fs-pointcoord & fp-fragment-position Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix index buffer drawingJerome Glisse2010-09-271-2/+3
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: use depth decompression in new pathJerome Glisse2010-09-261-9/+48
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: set ENABLE_KILL in the shader state in the new designBas Nieuwenhuizen2010-09-261-0/+8
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* r600g: fix vertex resource & polygon offsetJerome Glisse2010-09-251-17/+62
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: Disable unused variables.Vinson Lee2010-09-241-1/+1
| | | | | | | | | The variables are only used in currently disabled code. Fixes this GCC warning. r600_state2.c: In function 'r600_flush2': r600_state2.c:613: warning: unused variable 'dname' r600_state2.c:612: warning: unused variable 'dc'
* r600g: bring over fix from old path to new pathJerome Glisse2010-09-241-17/+137
| | | | | | | | | | Up to 2010-09-19: r600g: fix tiling support for ddx supplied buffers 9b146eae2521d8e5f6d3cbefa4f6f7737666313a user buffer seems to be broken... new to fix that. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix evergreen new pathJerome Glisse2010-09-241-1/+1
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: evergreen fix for new designJerome Glisse2010-09-241-8/+8
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: initial evergreen support in new pathJerome Glisse2010-09-231-115/+49
| | | | | | This doesn't work yet. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix multiple occlusion query on same idJerome Glisse2010-09-221-1/+9
| | | | | | | When calling query begin using same query id we need to discard previous query results. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: disable shader rebuild optimization & account cb flush packetJerome Glisse2010-09-221-21/+4
| | | | | | | | | Shader rebuild should be more clever, we should store along each shader all the value that change shader program rather than using flags in context (ie change sequence like : change vs buffer, draw, change vs buffer, switch shader will trigger useless shader rebuild). Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix typo in struct member nameDave Airlie2010-09-221-1/+1
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* r600g: occlusion query for new designJerome Glisse2010-09-211-0/+47
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix multi buffer renderingJerome Glisse2010-09-211-2/+2
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: directly allocate bo for user bufferJerome Glisse2010-09-211-2/+36
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: use pipe context for flushing inside mapJerome Glisse2010-09-201-0/+3
| | | | | | | | | This allow to share code path btw old & new, also remove check on reference this might make things a little slower but new design doesn't use reference stuff. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: move chip class to radeon common structureJerome Glisse2010-09-201-28/+0
| | | | | | | So texture code can be shared btw new state design & old one. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: Fix false and true.Corbin Simpson2010-09-191-5/+5
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* r600g: Use align() instead of handrolled code.Corbin Simpson2010-09-191-2/+1
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* r600g: Silence unused variable warnings.Vinson Lee2010-09-171-0/+2
| | | | The variables are used in code that is currently ifdef'ed out.
* r600g: Remove unnecessary header.Vinson Lee2010-09-171-1/+0
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* r600g: alternative command stream building from contextJerome Glisse2010-09-171-0/+2227
Winsys context build a list of register block a register block is a set of consecutive register that will be emited together in the same pm4 packet (the various r600_block* are there to provide basic grouping that try to take advantage of states that are linked together) Some consecutive register are emited each in a different block, for instance the various cb[0-7]_base. At winsys context creation, the list of block is created & an index into the list of block. So to find into which block a register is in you simply use the register offset and lookup the block index. Block are grouped together into group which are the various pkt3 group of config, context, resource, Pipe state build a list of register each state want to modify, beside register value it also give a register mask so only subpart of a register can be updated by a given pipe state (the oring is in the winsys) There is no prebuild register list or define for each pipe state. Once pipe state are built they are bound to the winsys context. Each of this functions will go through the list of register and will find into which block each reg falls and will update the value of the block with proper masking (vs/ps resource/constant are specialized variant with somewhat limited capabilities). Each block modified by r600_context_pipe_state_set* is marked as dirty and we update a count of dwords needed to emit all dirty state so far. r600_context_pipe_state_set* should be call only when pipe context change some of the state (thus when pipe bind state or set state) Then to draw primitive you make a call to r600_context_draw void r600_context_draw(struct r600_context *ctx, struct r600_draw *draw) It will check if there is enough dwords in current cs buffer and if not will flush. Once there is enough room it will copy packet from dirty block and then add the draw packet3 to initiate the draw. The flush will send the current cs, reset the count of dwords to 0 and remark all states that are enabled as dirty and recompute the number of dwords needed to send the current context. Signed-off-by: Jerome Glisse <[email protected]>