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path: root/src/gallium/drivers/r600/r600_pipe.h
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* r600g: make framebuffer atom rely on dual src blend state.Dave Airlie2017-03-151-0/+1
* gallium/radeon: move r600_common_context::texture_buffers to r600gMarek Olšák2016-10-041-0/+5
* gallium/radeon: set VPORT_ZMIN/MAX registers correctlyMarek Olšák2016-09-051-0/+1
* gallium/radeon: add can_sample_z/s flags for texturesNicolai Hähnle2016-07-061-8/+0
* r600g: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2016-06-251-0/+2
* r600g: only do necessary cache flushes in cp_dma_clear_bufferMarek Olšák2016-06-041-0/+17
* r600g: fix CP DMA hazard with index buffer fetches (v3)Marek Olšák2016-06-041-1/+4
* radeon/winsys: introduce radeon_winsys_cs_chunkNicolai Hähnle2016-06-011-5/+5
* gallium/radeon: use radeon_emitNicolai Hähnle2016-05-171-2/+2
* gallium/radeon: clean left-shift undefined behaviorNicolai Hähnle2016-05-071-3/+3
* r600g/radeonsi: send endian info to format translation functionsOded Gabbay2016-04-261-3/+5
* r600: fix missing include for Elements macroDave Airlie2016-04-261-0/+1
* r600g: Move R600_BIG_ENDIAN to r600_pipe_common.hOded Gabbay2016-04-181-6/+0
* r600g: use common scissor and viewport codeMarek Olšák2016-04-121-17/+0
* radeonsi: move scissor and viewport states into gallium/radeonMarek Olšák2016-04-121-2/+0
* r600g: clean up aniso state translationMarek Olšák2016-04-121-1/+0
* r600g: add pausing pipeline & streamout queries into set_active_query_stateMarek Olšák2016-04-121-1/+1
* r600g: implement set_active_query_state for pausing occlusion queriesMarek Olšák2016-04-121-0/+1
* r600g: simplify r600_set_occlusion_query_stateMarek Olšák2016-04-121-1/+0
* r600g: remove TGSI->LLVM translationMarek Olšák2016-03-201-3/+0
* gallium/radeon: remove old CS tracingMarek Olšák2016-03-201-6/+0
* r600g: remove support for DRM < 2.12.0Marek Olšák2016-03-011-1/+0
* gallium/r600: Replace ALIGN_DIVUP with DIV_ROUND_UPKrzysztof Sobiecki2016-01-061-1/+0
* r600: fix viewport clipping handling (v2)Dave Airlie2015-12-221-0/+1
* r600/eg: workaround bug with tess shader and dynamic GPRs.Dave Airlie2015-12-071-3/+7
* r600: create fixed function tess control shader fallback.Dave Airlie2015-12-071-0/+2
* r600: create LDS info constants buffer and write LDS registers. (v2)Dave Airlie2015-12-071-3/+25
* r600: workout bitmask for the used tcs inputs/outputs.Dave Airlie2015-12-071-0/+3
* r600: add set_tess_state callback.Dave Airlie2015-12-071-0/+1
* r600: hook up constants/samplers/sampler view for tessellationDave Airlie2015-12-071-1/+1
* r600: add shader key entries for tcs and tes.Dave Airlie2015-12-071-0/+4
* r600: add functions to update ls/hs state.Dave Airlie2015-12-071-0/+2
* r600: move to using hw stages array for hw stage atomsDave Airlie2015-12-071-5/+2
* r600: make adjust_gprs use hw stages.Dave Airlie2015-12-071-1/+1
* r600: introduce HW shader stage definesDave Airlie2015-12-071-0/+11
* r600: SMX returns CONTEXT_DONE early workaroundDave Airlie2015-12-021-1/+1
* r600: do SQ flush ES ring rolling workaroundDave Airlie2015-12-021-1/+1
* gallium/radeon: atomize render condition (SET_PREDICATION)Marek Olšák2015-11-131-1/+1
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-111-0/+1
* r600g: only do depth-only or stencil-only in-place decompressionMarek Olšák2015-10-031-1/+3
* r600g: lower number of driver const buffersDave Airlie2015-09-121-10/+18
* gallium/radeon: remove 'dirty' member from r600_atomGrazvydas Ignotas2015-09-031-2/+0
* r600g: simplify dirty atom trackingGrazvydas Ignotas2015-09-031-39/+6
* r600g: start numbering atoms from 1Grazvydas Ignotas2015-09-031-1/+1
* r600g: make all viewport states use single atomGrazvydas Ignotas2015-09-031-4/+4
* r600g: make all scissor states use single atomGrazvydas Ignotas2015-09-031-4/+4
* gallium/radeon: rename write_*_reg functionsMarek Olšák2015-09-011-10/+10
* r600: move prim convert from geom shader to function.Dave Airlie2015-08-311-25/+1
* r600g: Set geometry properties in r600_create_shader_state()Edward O'Callaghan2015-08-301-0/+3
* r600g: Move geometry properties state from shader to selectorEdward O'Callaghan2015-08-301-0/+5