summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/r600/r600_llvm.c
Commit message (Expand)AuthorAgeFilesLines
* radeon: Rename struct radeon_llvm_binary to radeon_shader_binary v2Tom Stellard2014-03-071-2/+2
* r600g: s/r600_llvm_gpu_string/r600_get_llvm_processor_name/Michel Dänzer2014-01-281-1/+1
* r600/llvm: Free binary.code/binary.config in r600_llvm_compileAaron Watry2013-11-151-0/+3
* r600/llvm: initialize radeon_llvm_binaryAaron Watry2013-11-151-0/+1
* r600/llvm: Store inputs in function argumentsVincent Lejeune2013-11-111-0/+119
* r600/llvm: Fix isampleBuffer on preEGVincent Lejeune2013-11-061-1/+14
* r600/llvm: Fix texbuf for pre EG genVincent Lejeune2013-11-061-0/+29
* r600/llvm: Adds support for MSAAVincent Lejeune2013-10-021-1/+51
* r600g/llvm: Undef z and w component of 2D TXP instVincent Lejeune2013-10-021-1/+2
* r600g/llvm: fix txq for texture bufferVincent Lejeune2013-10-021-2/+7
* r600g/compute: Accept LDS size from the LLVM backendTom Stellard2013-06-281-0/+3
* r600g/llvm: Fix texelFetchOffset-2DVincent Lejeune2013-05-201-0/+6
* r600g/llvm: Fix cubearray textureSizeVincent Lejeune2013-05-201-0/+15
* r600g/llvm: Factorize code loading from const buffer.Vincent Lejeune2013-05-201-27/+24
* r600g/llvm: Parse config values in register / value pairsTom Stellard2013-05-061-3/+30
* r600g/llvm: Don't feed LLVM output through r600_bytecode_build()Tom Stellard2013-05-061-4/+7
* r600g/llvm: Undefines unrequired texture coord valuesVincent Lejeune2013-05-041-1/+28
* r600g/llvm: get use_kill from compiler shaderVincent Lejeune2013-04-301-0/+2
* r600g/llvm: Pass struct r600_bytecode to r600_llvm_compileTom Stellard2013-04-241-4/+3
* r600/llvm: Read stacksize from config headerVincent Lejeune2013-04-231-0/+2
* r600g/llvm: Use gprcount from llvmVincent Lejeune2013-04-171-0/+2
* radeon/llvm: Use a struct for storing compiled codeTom Stellard2013-04-151-2/+6
* gallium: PIPE_COMPUTE_CAP_IR_TARGET - allow drivers to specify a processor v2Tom Stellard2013-04-051-63/+0
* radeon/llvm: move system value fetching to common codeChristian König2013-04-021-12/+0
* r600g/llvm: uses function attribute to pass shader typeVincent Lejeune2013-04-011-0/+1
* tgsi: use separate structure for indirect address v2Christian König2013-03-191-1/+1
* mesa: Use PACKAGE_BUGREPORT macro.Matt Turner2013-03-121-1/+1
* r600g: remove r600.h, move the stuff elsewhere (mostly to r600_pipe.h)Marek Olšák2013-03-111-1/+0
* radeon/llvm: make SGPRs proper function arguments v2Christian König2013-03-071-0/+1
* r600g/llvm: Update CONSTANT_BUFFER address space definitionChristian König2013-03-071-1/+1
* r600g/llvm: Support for TBOVincent Lejeune2013-02-181-0/+28
* r600g/llvm: Fix alpha_to_one piglit testsVincent Lejeune2013-02-181-0/+2
* r600g/llvm: Add support for UBOVincent Lejeune2013-02-181-1/+5
* r600g/llvm: Select the correct GPU type for RV670Tom Stellard2013-02-011-1/+1
* r600g: improve inputs/interpolation handling with llvm backendVadim Girlin2013-01-281-127/+68
* r600g/llvm: Add dummy export for vs outputVincent Lejeune2013-01-281-2/+20
* r600g/llvm: Fixes addressspace of basevectors for clipvertexVincent Lejeune2013-01-191-1/+2
* r600g/llvm: tgsi to llvm emits store.swizzle intrinsic for vs/fs outputVincent Lejeune2013-01-181-56/+141
* r600g/llvm: tgsi to llvm emits stream output intrinsics.Vincent Lejeune2013-01-181-0/+32
* r600g/llvm: rework handling of the constantsVadim Girlin2013-01-181-6/+17
* radeon/llvm: improve cube map handlingVadim Girlin2012-12-181-0/+3
* r600g: separate resource_id and sampler_id tex info in tgsi-to-llvmVincent Lejeune2012-11-291-0/+3
* r600g: make tgsi-to-llvm generates store.pixel* intrinsic for fsVincent Lejeune2012-11-021-8/+63
* r600g: tgsi-to-llvm emits right input intrinsicsVincent Lejeune2012-10-301-13/+49
* r600g: rewrite tgsi-to-llvm load-input to handle fragcoordVincent Lejeune2012-10-241-41/+83
* r600g: use a select to handle front/back color in llvmVincent Lejeune2012-10-091-0/+36
* radeon/llvm: improve select_cc lowering to generate CND* more oftenVincent Lejeune2012-09-271-0/+15
* r600g/llvm: rs780/rs880 are r600 asicsAlex Deucher2012-09-201-2/+2
* r600g: Add missing break to case statementTom Stellard2012-09-191-0/+1
* radeon/llvm: Emit ISA for ALU instructions in the R600 code emitterMichal Sciubidlo2012-09-191-0/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-15 19:39:01 +0000