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path: root/src/gallium/drivers/r600/r600_hw_context.c
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* gallium: add PIPE_RESOURCE_FLAG_SINGLE_THREAD_USE to skip util_range lockMarek Olšák2019-10-071-2/+2
| | | | | | | | | u_upload_mgr sets it, so that util_range_add can skip the lock. The time spent in tc_transfer_flush_region decreases from 0.8% to 0.2% in torcs on radeonsi. Reviewed-by: Kenneth Graunke <[email protected]>
* winsys/amdgpu: add REWIND emulation via INDIRECT_BUFFER into cs_check_spaceMarek Olšák2019-05-161-1/+1
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* r600/eg: rework atomic counter emission with flushesDave Airlie2018-08-211-2/+5
| | | | | | | | | | | | | | | | | | | | With the current code, we didn't do the space checks prior to atomic counter setup emission, but we also didn't add atomic counters to the space check so we could get a flush later as well. These flushes would be bad, and lead to problems with parallel tests. We have to ensure the atomic counter copy in, draw emits and counter copy out are kept in the same command submission unit. This reworks the code to drop some useless masks, make the counting separate to the emits, and make the space checker handle atomic counter space. [airlied: want this in 18.2] Fixes: 06993e4ee (r600: add support for hw atomic counters. (v3))
* r600: fix build after the removal of RADEON_PRIO_* flagsMarek Olšák2018-07-161-4/+2
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* amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák2018-06-191-5/+5
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* r600g: Implement scratch buffer state management (v2)Glenn Kennard2018-02-091-0/+4
| | | | | | | v2: add Glenn's fixes Signed-off-by: Glenn Kennard <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* r600: add ARB_query_buffer_object supportDave Airlie2018-01-291-0/+5
| | | | | | | | | | | | | | This uses a different shader than radeonsi, as we can't address non-256 aligned ssbos, which the radeonsi code does. This passes some extra offsets into the shader. It also contains a set of u64 instruction implementation that may or may not be complete (at least the u64div is definitely not something that works outside this use-case). If r600 grows 64-bit integers, it will use the GLSL lowering for divmod. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/cs: add support for compute to image/buffers/atomics stateDave Airlie2017-12-051-0/+2
| | | | | | | This just adds the compute paths to state handling for the main objects Signed-off-by: Dave Airlie <[email protected]>
* r600: add ARB_shader_storage_buffer_object support (v3)Dave Airlie2017-12-011-1/+3
| | | | | | | | | | | | | | | This just builds on the image support. Evergreen only has ssbo for fragment and compute no other stages. v2: handle images and ssbo in the same shader properly (Ilia) v3: fix RESQ on buffers, fix missing atom emit fix first element offset use R32 format write separate buffer rat store path. (from running deqp gles3.1 tests) Signed-off-by: Dave Airlie <[email protected]>
* r300,r600,radeonsi: replace RADEON_FLUSH_* with PIPE_FLUSH_*Marek Olšák2017-11-291-4/+4
| | | | | | and handle PIPE_FLUSH_HINT_FINISH in r300. Reviewed-by: Nicolai Hähnle <[email protected]>
* r600: add core pieces of image support.Dave Airlie2017-11-171-0/+2
| | | | | | | | | This adds the atoms and gallium api implementations, along with support for compress/decompress paths for shader images. Tested-By: Gert Wollny <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: print CE IBs into ddebug reportsMarek Olšák2017-08-011-1/+1
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: fix crash when file in R600_TRACE doesn't existConstantine Charlamov2017-06-261-4/+5
| | | | | | | | | | …and print error in such case. Which probably is not a rare event btw because fopen doesn't expand ~ to $HOME. Also get rid of unused "bool ret" variable. Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/eg: add support for tracing IBs after a hang.Dave Airlie2017-06-011-0/+39
| | | | | | | | | This is a poor man's version of radeonsi ddebug stuff, this should get hooked into that infrastructure, and grow more stuff, but for now, just create R600_TRACE var that points to a file that you want to dump the last IB to. Signed-off-by: Dave Airlie <[email protected]>
* r600g: extract a code into a r600_emit_rasterizer_prim_state()Constantine Kharlamov2017-04-041-0/+2
| | | | | | | | | | | Also change gs_output_prim type: unsigned → pipe_prim_type. The idea of the code is mostly taken from radeonsi. The new code operating on prev/curr rast_primitives saves ≈15 reloads of PA_SC_LINE_STIPPLE per frame in Kane&Lynch2 Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: prevent SDMA stalls by detecting RAW hazards in need_dma_spaceMarek Olšák2017-01-051-1/+0
| | | | | | | | Call r600_dma_emit_wait_idle only when there is a possibility of a read-after-write hazard. Buffers not yet used by the SDMA IB don't have to wait. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: implement set_device_reset_callbackNicolai Hähnle2016-10-051-0/+3
| | | | | | | | | Check for device reset on flush. It would be nicer if the kernel just reported this as an error on the submit ioctl (and similarly for fences), but this will do for now. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: set VPORT_ZMIN/MAX registers correctlyMarek Olšák2016-09-051-0/+1
| | | | | | | | | | | | Calculate depth ranges from viewport states and pipe_rasterizer_state::clip_halfz. The evergreend.h change is required to silence a warning. This fixes this recently updated piglit: arb_depth_clamp/depth-clamp-range Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: unify and simplify checking for an empty gfx IBMarek Olšák2016-08-251-7/+1
| | | | | | | We can take advantage of the fact that multi_fence does the obvious thing with NULL fences. This fixes unflushed fences that can get stuck due to empty IBs.
* gallium/radeon: count gfx IB flushesMarek Olšák2016-08-061-0/+1
| | | | | | | This will be used as a counter for whether fence_finish needs to flush the IB. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move radeon_winsys::cs_memory_below_limit to driversMarek Olšák2016-08-061-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: use last_gfx_fence like radeonsiMarek Olšák2016-08-031-3/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove RADEON_FLUSH_KEEP_TILING_FLAGS flagMarek Olšák2016-07-191-3/+0
| | | | | | always set Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: don't flush caches when binding shader resourcesMarek Olšák2016-06-041-0/+4
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: only do necessary cache flushes in cp_dma_copy_bufferMarek Olšák2016-06-041-14/+1
| | | | | | | | | The main impact is that {upload, draw, upload, draw, ..} doesn't flush framebuffer caches before every upload. Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: fix CP DMA hazard with index buffer fetches (v3)Marek Olšák2016-06-041-1/+68
| | | | | | | | | v3: use PFP_SYNC_ME on EG-CM only when supported by the kernel, otherwise use MEM_WRITE + WAIT_REG_MEM to emulate that Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: properly sync CP with CP DMA on R6xxMarek Olšák2016-06-041-1/+8
| | | | | | | | This will allow removing useless cache & IB flushes. Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* r600g: write WAIT_UNTIL in the correct placeMarek Olšák2016-06-041-8/+11
| | | | | | | | | | This has been wrong all along. Fixing this will allow removing useless cache flushes. Cc: 11.1 11.2 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeon/winsys: introduce radeon_winsys_cs_chunkNicolai Hähnle2016-06-011-1/+2
| | | | | | | We will chain multiple chunks together and will keep pointers to the older chunks to support IB dumping. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use cs_check_space throughoutNicolai Hähnle2016-06-011-4/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add radeon_emitted to check for non-trivial IBsNicolai Hähnle2016-05-171-4/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use radeon_emitNicolai Hähnle2016-05-171-18/+18
| | | | | | | Mostly generated using a sed-script, with manual fix-up for multi-line statements. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: flush if DMA IB memory usage is too highMarek Olšák2016-05-101-1/+1
| | | | | | | | This prevents IB rejections due to insane memory usage from many concecutive texture uploads. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix (S)DMA read-after-write hazardsMarek Olšák2016-05-101-0/+1
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: use common scissor and viewport codeMarek Olšák2016-04-121-6/+4
| | | | | | | | It's the same as radeonsi. This adds guard band support to r600g. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove R600_QUERY_HW_FLAG_TIMERMarek Olšák2016-04-121-1/+1
| | | | | | | not used anymore Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: merge timer and non-timer query listsMarek Olšák2016-04-121-2/+1
| | | | | | | All of them are paused only between IBs. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: add pausing pipeline & streamout queries into set_active_query_stateMarek Olšák2016-04-121-0/+10
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove old CS tracingMarek Olšák2016-03-201-9/+2
| | | | | | | | | | | | | | Cons: - it was only integrated in r600g - it doesn't work with GPUVM - it records buffer contents at the end of IBs instead of at the beginning, so the replay isn't exact - it lacks an IB parser and user-friendliness A better solution is apitrace in combination with gallium/ddebug, which has a complete IB parser and can pinpoint hanging CP packets. Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: remove support for DRM < 2.12.0Marek Olšák2016-03-011-3/+1
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* r600/eg: workaround bug with tess shader and dynamic GPRs.Dave Airlie2015-12-071-1/+1
| | | | | | | | | | | | When using tessellation on eg/ni chipsets, we must disable dynamic GPRs to workaround a hw bug where the GPU hangs when too many things get queued. This implements something like the r600 code to emit the transition between static and dynamic GPRs, and to statically allocate GPRs when tessellation is enabled. Signed-off-by: Dave Airlie <[email protected]>
* r600: add shader key entries for tcs and tes.Dave Airlie2015-12-071-0/+4
| | | | | | | with tessellation vs can now run on ls, and tes can run on vs or es, tcs runs on hs. Signed-off-by: Dave Airlie <[email protected]>
* r600: move to using hw stages array for hw stage atomsDave Airlie2015-12-071-4/+4
| | | | | | | | | | This moves to using an array of hw stages for the atoms. Note this drops the 23 from the vertex shader, this value is calculated internally when shaders are bound, so not required here. Signed-off-by: Dave Airlie <[email protected]>
* gallium/radeon: atomize render condition (SET_PREDICATION)Marek Olšák2015-11-131-0/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: simplify restoring render condition after flushMarek Olšák2015-11-131-5/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: inline the r600_rings structureMarek Olšák2015-11-131-17/+17
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove the IB flushing flagMarek Olšák2015-11-131-3/+0
| | | | | | | Not needed anymore. A similar flag will be introduced in the next commit, which will be private in radeonsi. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move GFX/DMA flushing from add_to_buffer_list to need_cs_spaceMarek Olšák2015-11-131-0/+5
| | | | | | | | need_cs_space isn't invoked so often and is called before all commands too. This is a lot cleaner. The code in radeon_add_to_buffer_list always seemed dodgy to me. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: tell the winsys the exact resource binding typesMarek Olšák2015-10-031-4/+4
| | | | | | | Use the priority flags and expand them. This information will be used for debugging. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: simplify dirty atom trackingGrazvydas Ignotas2015-09-031-5/+4
| | | | | | | Now that R600_NUM_ATOMS is below 64, dirty atom tracking can be simplified. Signed-off-by: Marek Olšák <[email protected]>
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