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path: root/src/gallium/drivers/r600/r600_asm.c
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* r600g/llvm: Add support for native isa for pre EGVincent Lejeune2013-04-081-1/+5
* r600g/llvm: Do not override llvm provided stack_sizeVincent Lejeune2013-04-031-1/+2
* r600g: don't reserve more stack space than required v5Vadim Girlin2013-04-021-4/+39
* r600g/llvm: Add support for cf_alu native encodeVincent Lejeune2013-04-011-1/+1
* r600g: dump vertex elements state along with the fetch shaderMarek Olšák2013-03-111-0/+8
* r600g: remove bytecode dumpingMarek Olšák2013-03-111-239/+0
* r600g: use a single env var R600_DEBUG, disable bytecode dumpingMarek Olšák2013-03-111-10/+1
* r600g: Check comp_mask before merging export instructionsVincent Lejeune2013-03-031-0/+1
* r600g: fix check_and_set_bank_swizzle for caymanVadim Girlin2013-03-031-7/+3
* r600g: implement shader disassembler v3Vadim Girlin2013-02-011-2/+434
* r600g: use tables with ISA info v3Vadim Girlin2013-02-011-913/+173
* r600g: Add ar_chan member to struct r600_bytecodeTom Stellard2013-01-281-0/+2
* r600g: More robust checks for MOVA_INT instructionsTom Stellard2013-01-281-8/+35
* r600g: add multi ring support with dma as first second ring v4Jerome Glisse2013-01-281-2/+1
* r600g/llvm: tgsi to llvm emits stream output intrinsics.Vincent Lejeune2013-01-181-0/+2
* r600g: texture buffer object + glsl 1.40 enable support (v2)Dave Airlie2013-01-111-1/+1
* r600g: Fix memory leak in r600_bytecode_add_vtx.Vinson Lee2013-01-091-0/+1
* radeon/winsys: move radeon family/class identification to winsysJerome Glisse2013-01-071-2/+3
* r600g: suballocate memory for fetch shaders from a large bufferMarek Olšák2012-12-121-12/+14
* r600g: fix pre eg export with llvmVincent Lejeune2012-11-081-1/+1
* r600g: make tgsi-to-llvm generates store.pixel* intrinsic for fsVincent Lejeune2012-11-021-0/+17
* r600g: implement texturing with 8x MSAA compressed surfaces for EvergreenMarek Olšák2012-10-291-2/+8
* r600g: force bank_swizzle if already setVincent Lejeune2012-10-241-0/+2
* r600g: move shader structures into r600_shader.hMarek Olšák2012-10-121-0/+1
* r600g: atomize fetch shaderMarek Olšák2012-10-101-32/+31
* r600g: fix instance divisor on CaymanMarek Olšák2012-09-271-19/+35
* r600g: Use LOOP_START_DX10 for loopsTom Stellard2012-09-191-1/+7
* radeon/llvm: Emit ISA for ALU instructions in the R600 code emitterMichal Sciubidlo2012-09-191-0/+43
* r600g: fix relative addressing on RS780 and RS880Marek Olšák2012-08-281-7/+6
* r600g: Fix instruction group merge when there are predicated insts.Vincent Lejeune2012-08-151-0/+18
* radeon/llvm: Do not use PV/PS if PRED_SEL does not matchVincent Lejeune2012-08-151-2/+4
* r600g: Add support for predicatesVincent Lejeune2012-08-151-5/+7
* r600g: Update number of gprs when adding a vertex instructionTom Stellard2012-07-091-0/+4
* r600g: add RECIP_INT, PRED_SETE_INT to r600_bytecode_get_num_operandsVadim Girlin2012-05-251-0/+2
* r600g: Handle MUL_IEEE in r600_bytecode_get_num_operandsTom Stellard2012-05-171-0/+2
* gallium/drivers: handle TGSI_OPCODE_CEILChristoph Bumiller2012-05-091-0/+2
* r600g: Print integer values of literal constants in shader dumpsTom Stellard2012-05-031-1/+2
* r600g: Add support for reading BREAK_LOGICALZ_i32 from bytestreamTom Stellard2012-05-031-0/+1
* r600g: fixed the bug with VTX fetches in TEX clauses for evergreenAdam Rak2012-05-021-7/+6
* r600g: Add FC_NATIVE instructionTom Stellard2012-05-021-0/+7
* winsys/radeon: simplify buffer map/unmap functionsMarek Olšák2012-04-291-2/+2
* r600g: fix gpr number calculationVadim Girlin2012-04-231-0/+3
* r600g: kill off the fallback for crazy src_offset valuesMarek Olšák2012-04-041-16/+8
* r600g: cleanup includesMarek Olšák2012-03-051-8/+5
* r600g: remove obsolete todo commentsMarek Olšák2012-03-051-1/+1
* r600g: merge r600_context with r600_pipe_contextMarek Olšák2012-01-311-2/+2
* r600g: remove u8,u16,u32,u64 typesMarek Olšák2012-01-311-2/+2
* r600g: fix inconsistency with INTERP* opcode definitionsVadim Girlin2012-01-241-3/+3
* r600g: replace raw opcodes with names in the is_alu_trans/vectorVadim Girlin2012-01-241-12/+80
* r600g: shift integer ops are trans unit only on r600.Dave Airlie2012-01-221-0/+1
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