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path: root/src/gallium/drivers/r600/evergreend.h
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* r600g: implement compression for MSAA colorbuffers for evergreenMarek Olšák2012-08-271-9/+67
| | | | | | | | | | | | | | | | This adds the FMASK and CMASK buffers. They share the same resource with color data. COMPRESSION and FAST_CLEAR are always enabled if both FMASK and CMASK are allocated. We initialize the CMASK to a "compressed" state (not "fast cleared"), so that we can keep FAST_CLEAR enabled all the time. Both FMASK and CMASK must be present at the moment. If either one is missing, the other one is not used. v2: add cayman regs in the list Reviewed-by: Jerome Glisse <[email protected]>
* r600g: implement MSAA rendering and texturing for evergreen and caymanMarek Olšák2012-08-151-2/+22
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* r600g: implement alpha-to-coverageMarek Olšák2012-08-151-0/+7
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* r600g: Add helper functions for emitting compute SET_CONTEXT packetsTom Stellard2012-07-271-5/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g: set DISABLE in CB_COLOR_CONTROL if colormask is 0Marek Olšák2012-07-121-0/+2
| | | | | | this will be useful for in-place DB decompression, otherwise should be harmless Reviewed-by: Alex Deucher <[email protected]>
* r600g: enable DUAL_EXPORT mode when possibleVadim Girlin2012-06-271-0/+7
| | | | | | | | It seems DUAL_EXPORT on evergreen may be enabled when all CBs use 16-bit export mode (EXPORT_4C_16BPC), also there should be at least one CB, and the PS shouldn't export depth/stencil. Signed-off-by: Vadim Girlin <[email protected]>
* r600g: Compute support for CaymanTom Stellard2012-06-061-0/+3
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* r600g: compute support for evergreenAdam Rak2012-06-011-0/+74
| | | | | | | | | Tom Stellard: - Updated for gallium interface changes - Fixed a few bugs: + Set the loop counter + Calculate the correct number of pipes - Added hooks into the LLVM compiler
* r600g: Fix the evergreen offset/end register definitionsTom Stellard2012-05-021-9/+5
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* r600g: use SX_MISC to implement rasterizer discardMarek Olšák2012-03-081-0/+3
| | | | Yeah I am reworking it again. This is way simpler than the other methods.
* r600g: initialize VS_GS_OUT_PRIM_TYPEMarek Olšák2012-03-051-0/+5
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: initialize SX_SURFACE_SYNCMarek Olšák2012-03-051-0/+2
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: rework scissor for evergreenMarek Olšák2012-03-051-0/+2
| | | | | | | | VPORT_SCISSOR is the OpenGL scissor. How do I know? Because there are 16 of them just like GL4.1 has multiple scissor rectangles. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: turn init_config into a command buffer for starting a CSMarek Olšák2012-02-211-1/+0
| | | | | | | | | | | This is the first pure command buffer. It contains CS initialization packets and emits invariant state (i.e. the registers which never or rarely change). The affected registers are removed from *_hw_context.c, so that both ways of emitting commands can co-exist. v2: emit context_control in cayman's start_cs too
* r600g: fix tex tile_type offset for caymanAlex Deucher2012-02-101-0/+3
| | | | | | | | Noticed by taiu on IRC. Signed-off-by: Alex Deucher <[email protected]> Note: this is a candidate for the stable branches.
* r600g: add support for common surface allocator for tiling v13Jerome Glisse2012-02-061-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tiled surface have all kind of alignment constraint that needs to be met. Instead of having all this code duplicated btw ddx and mesa use common code in libdrm_radeon this also ensure that both ddx and mesa compute those alignment in the same way. v2 fix evergreen v3 fix compressed texture and workaround cube texture issue by disabling 2D array mode for cubemap (need to check if r7xx and newer are also affected by the issue) v4 fix texture array v5 fix evergreen and newer, split surface values computation from mipmap tree generation so that we can get them directly from the ddx v6 final fix to evergreen tile split value v7 fix mipmap offset to avoid to use random value, use color view depth view to address different layer as hardware is doing some magic rotation depending on the layer v8 fix COLOR_VIEW on r6xx for linear array mode, use COLOR_VIEW on evergreen, align bytes per pixel to a multiple of a dword v9 fix handling of stencil on evergreen, half fix for compressed texture v10 fix evergreen compressed texture proper support for stencil tile split. Fix stencil issue when array mode was clear by the kernel, always program stencil bo. On evergreen depth buffer bo need to be big enough to hold depth buffer + stencil buffer as even with stencil disabled things get written there. v11 rebase on top of mesa, fix pitch issue with 1d surface on evergreen, old ddx overestimate those. Fix linear case when pitch*height < 64. Fix r300g. v12 Fix linear case when pitch*height < 64 for old path, adapt to libdrm API change v13 add libdrm check Signed-off-by: Jerome Glisse <[email protected]>
* r600g: set minimum point size to 1.0 for non-sprite non-aa pointsMarek Olšák2012-01-311-0/+6
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* r600g: clean up register headersAlex Deucher2012-01-231-60/+50
| | | | | | | | - CP_INTERRUPT packet doesn't exist - remove lots of r6xx copy/paste remnants from evergreen reg header - fix some cayman specific registers Signed-off-by: Alex Deucher <[email protected]>
* r600g: set round_mode to truncate and get rid of tgsi_f2i on evergreenVadim Girlin2012-01-221-2/+44
| | | | | Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: implement clip vertex v2Vadim Girlin2012-01-211-0/+4
| | | | | | | | Clip planes are uploaded as a constant buffer and used by the vertex shader to produce corresponding clip distances for hw clipping. Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix typo in evergreen registerAlex Deucher2012-01-191-7/+6
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: implement transform feedbackMarek Olšák2011-12-171-0/+45
| | | | | | | | r600: DONE. r700: MOSTLY (done but locks up). Evergreen: MOSTLY (done but doesn't work for an unknown reason). The kernel support will come soon.
* r600g: add initial linestipple support.Dave Airlie2011-11-061-0/+6
| | | | | | | It seems line loop stipple in hardware needs something I don't know, it might need a proper geometry shader who knows. Signed-off-by: Dave Airlie <[email protected]>
* r600g: Initialize multi VGT related register on Cayman.Michel Dänzer2011-09-141-0/+10
| | | | | | | | Prevents lockups with piglit tests draw-elements and draw-vertices using large numbers of vertices. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: implement NV_primitive_restart functionality (v2)Marek Olšák2011-08-181-0/+4
| | | | | | | | | Needed for GL3. v2: evergreen support I don't set PA_SU_SC_MODE_CNTL.MULTI_PRIM_IB_ENA. piglit/primitive-restart does pass though. Tested on RV730 and EG-REDWOOD.
* r600g: emit SQ_LDS_RESOURCE_MGMTAlex Deucher2011-07-121-0/+7
| | | | | | | | | | | | Need to be initialized to a reasonable value as compute code may change it. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=39119 NOTE: This is a candidate for the 7.11 branch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: condition evergreen dyn gpr resource managementDave Airlie2011-06-081-0/+6
| | | | | | | So only with kernel version 2.7 can this work, thanks to Alex for pointing that out. Also add a workaround for a hw bug. Signed-off-by: Dave Airlie <[email protected]>
* r600g: enable dynamic GPR resource management on evergreenDave Airlie2011-06-081-2/+4
| | | | | | | | | | | Evergreen can do this as well as cayman, so we should enable it. This fixes a gpu lockup with glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined.shader_test I need to add a better workaround for r600/r700. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add initial cayman acceleration support.Dave Airlie2011-05-251-0/+43
| | | | | | | | | | | | | | | | Cayman is the RadeonHD 69xx series of GPUs. This adds support for 3D acceleration to the r600g driver. Major changes: Some context registers moved around - mainly MSAA and clipping/guardband related. GPR allocation is all dynamic no vertex cache - all unified in texture cache. 5-wide to 4-wide shader engines (no scalar or trans slot) - some changes to how instructions are placed into slots - removal of END_OF_PROGRAM bit in favour of END flow control clause - no vertex fetch clause - TC accepts vertex or texture Signed-off-by: Dave Airlie <[email protected]>
* r600g: anisotropic filtering support for evergreen hwJerome Glisse2011-05-091-0/+6
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: implement seamless_cube_map for evergreenMarek Olšák2011-05-061-0/+9
| | | | The r600/r700 support will follow soon.
* r600g: don't flush the dest caches on every drawFredrik Höglund2011-04-201-0/+1
| | | | | | | Keep track of when the caches are dirty, and only flush them when the framebuffer state is set and when the context is flushed. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add evergreen+ big endian supportAlex Deucher2011-04-191-0/+6
| | | | | | Based on Cédric's r6xx/r7xx patch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: add NV_conditional_render support.Dave Airlie2011-03-011-1/+2
| | | | | | | | This is reliant on a drm patch that I posted on the list + a version bump. These will appear in drm-next today. Signed-off-by: Dave Airlie <[email protected]>
* r600g: handle 16/32 u/s norm formats properlyDave Airlie2011-02-111-0/+3
| | | | | | | add support for the 32-bit types, also fixup the export setting to handle types with channels > 11 bits properly Signed-off-by: Dave Airlie <[email protected]>
* r600g: start looking at evergreen tiling.Dave Airlie2011-02-011-0/+3
| | | | | | | | this just adds the ioctl interface and sets the tile type and array mode in the correct place. This seems to bring eg 1D tiling to the same level, and issues as on r600. No idea how to address 2D yet.
* r600g: remove some non-existent evergreen reg fieldsAlex Deucher2011-01-301-6/+0
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: handle the write all cbufs property.Dave Airlie2011-01-311-3/+0
| | | | | | | | | | This only works on r600/r700 so far, evergreen doesn't appear to have the multiwrite enable bit in the color control, so we may have to actually do a shader rewrite on EG hardware. remove some duplicate code reg defines also. Signed-off-by: Dave Airlie <[email protected]>
* r600g: Fix some register value name typos.Henri Verbeet2011-01-151-2/+2
| | | | SFR -> SRF.
* r600g: fix additional EVENT_WRITE packetAlex Deucher2010-11-221-0/+9
| | | | Add explicit EVENT_TYPE field
* evergreeng: set hardware pixelcenters according to gl_rasterization_rulesKeith Whitwell2010-11-031-0/+3
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* evergreeng: respect linewidth state, use integer widths onlyKeith Whitwell2010-11-031-0/+3
| | | | | | | | | | | Discard fractional bits from linewidth. This matches the nvidia closed drivers, my reading of the OpenGL SI and current llvmpipe behaviour. It looks a lot nicer & avoids ugliness where lines alternate between n and n+1 pixels in width along their length. Also fix up r600g to match.
* r600g: switch to a common formats.h file since they are in different regsDave Airlie2010-10-181-39/+0
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* r600g: fix stencil export for evergreen harderDave Airlie2010-10-131-2/+2
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* r600g: add missing eg reg definitionDave Airlie2010-10-131-0/+3
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* r600g: evergreen has no request size bit in texture word4Dave Airlie2010-10-111-3/+0
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* r600g: setup basic loop consts on r600 + evergreen.Dave Airlie2010-10-011-0/+1
| | | | this sets up a single loop constant like r600c does.
* r600g: fix evergreen draw-buffersDave Airlie2010-10-011-1/+1
| | | | just a typo in the register headers.
* r600g: add cb flushing for extra buffers + depth buffer on r600/evergreenDave Airlie2010-10-011-3/+12
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* r600g: fixup vertex format picking.Dave Airlie2010-10-011-34/+39
| | | | there are some vertex formats defined in r600c not in the docs.
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