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path: root/src/gallium/drivers/r600/evergreend.h
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* r600g: fix additional EVENT_WRITE packetAlex Deucher2010-11-221-0/+9
| | | | Add explicit EVENT_TYPE field
* evergreeng: set hardware pixelcenters according to gl_rasterization_rulesKeith Whitwell2010-11-031-0/+3
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* evergreeng: respect linewidth state, use integer widths onlyKeith Whitwell2010-11-031-0/+3
| | | | | | | | | | | Discard fractional bits from linewidth. This matches the nvidia closed drivers, my reading of the OpenGL SI and current llvmpipe behaviour. It looks a lot nicer & avoids ugliness where lines alternate between n and n+1 pixels in width along their length. Also fix up r600g to match.
* r600g: switch to a common formats.h file since they are in different regsDave Airlie2010-10-181-39/+0
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* r600g: fix stencil export for evergreen harderDave Airlie2010-10-131-2/+2
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* r600g: add missing eg reg definitionDave Airlie2010-10-131-0/+3
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* r600g: evergreen has no request size bit in texture word4Dave Airlie2010-10-111-3/+0
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* r600g: setup basic loop consts on r600 + evergreen.Dave Airlie2010-10-011-0/+1
| | | | this sets up a single loop constant like r600c does.
* r600g: fix evergreen draw-buffersDave Airlie2010-10-011-1/+1
| | | | just a typo in the register headers.
* r600g: add cb flushing for extra buffers + depth buffer on r600/evergreenDave Airlie2010-10-011-3/+12
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* r600g: fixup vertex format picking.Dave Airlie2010-10-011-34/+39
| | | | there are some vertex formats defined in r600c not in the docs.
* r600g: add winsys support for CTL constants.Dave Airlie2010-10-011-0/+6
| | | | | These need to be emitted, we also need them to do proper vtx start, instead of abusing index offset.
* r600g: fix evergreen depth flushing.Dave Airlie2010-10-011-0/+8
| | | | | although evergreen can apparantly sample direct from 24-bit, just make it work with the current method for now.
* r600g: build packet header onceJerome Glisse2010-09-271-0/+16
| | | | | | | | Build packet header once and allow to add fake register support so we can handle things like indexed set of register (evergreen sampler border registers for instance. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix reg definitionJerome Glisse2010-09-241-1/+3
| | | | | | Doesn't bother fixing old path code, just disable that reg. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fixup some evergreen register definitionsJerome Glisse2010-09-241-51/+51
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: evergreen fix for new designJerome Glisse2010-09-241-24/+19
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add some more vertex format support.Dave Airlie2010-09-241-0/+3
| | | | adds the sscaled formats, this passes some more of the draw-vertices tests.
* r600g: initial evergreen support in new pathJerome Glisse2010-09-231-0/+410
| | | | | | This doesn't work yet. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: Fixed the shift in S_02880C_KILL_ENABLE.Tilman Sauerbeck2010-09-171-1/+1
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Added DB_SHADER_CONTROL defines.Tilman Sauerbeck2010-09-171-0/+17
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: evergreen fixup dsa state for running query.Dave Airlie2010-09-131-1/+1
| | | | evergreen is always the same as r700 here.
* r600g: add initial evergreen supportDave Airlie2010-09-101-0/+1442
adds shader opcodes + assembler support (except ARL) uses constant buffers add interp instructions in fragment shader adds all evergreen hw states adds evergreen pm4 support. this runs gears for me on my evergreen