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path: root/src/gallium/drivers/r600/evergreend.h
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* r600g: implement set_active_query_state for pausing occlusion queriesMarek Olšák2016-04-121-1/+1
* r600: fix masks for two of the unused evergreen regs.Dave Airlie2015-12-071-2/+2
* r600: fixes for register definitions.Dave Airlie2015-11-301-3/+3
* r600: add missing register to initial stateDave Airlie2015-11-301-1/+0
* r600: define registers required for tessellationDave Airlie2015-11-301-27/+105
* r600: initialised PGM_RESOURCES_2 for ES/GSDave Airlie2015-11-121-0/+2
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-111-0/+7
* Revert "r600g: Pass conservative depth parameters to hw"Dave Airlie2015-11-111-7/+0
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-111-0/+7
* r600: define some values for the fetch constant offsets.Dave Airlie2015-09-121-0/+8
* r600,compute: setup compute sampler states and viewsZoltan Gilian2015-08-141-0/+5
* r600g: Implement GL_ARB_draw_indirect for EG/CMGlenn Kennard2015-02-241-1/+0
* r600g: Implement GL_ARB_sample_shadingGlenn Kennard2014-10-121-0/+3
* r600g: clear constant buffer sizes at the beginning of CSMarek Olšák2014-08-141-0/+1
* r600g: use TGSI_PROPERTY to disable viewport and clippingChristoph Bumiller2014-06-021-0/+28
* r600g: fix hang on RV740 by using DX_RASTERIZATION_KILL instead of SX_MISCMarek Olšák2014-04-251-0/+3
* r600g: deobfuscate async DMA codeMarek Olšák2014-03-201-0/+4
* r600g: add primitive input support for gsDave Airlie2014-02-051-0/+4
* r600g: add hw register definitions for GS block setupVadim Girlin2014-02-051-6/+74
* r600g/compute: Emit DEALLOC_STATE on cayman after dispatching a compute shader.Tom Stellard2014-01-271-0/+1
* r600g: move streamout state to drivers/radeonMarek Olšák2013-08-311-8/+8
* r600g: rewrite FMASK allocation, fix FMASK texturing with 2 and 4 samplesMarek Olšák2013-05-151-0/+3
* r600g: Add evergreen_emit_cs_constant_buffers() v2Tom Stellard2013-04-251-0/+2
* r600g: use CP DMA for buffer clears on evergreen+Alex Deucher2013-04-241-0/+42
* r600g: atomize pixel shaderMarek Olšák2013-03-111-0/+1
* r600g: add async for staging buffer upload v2Jerome Glisse2013-01-281-0/+15
* r600g: add htile support v16Jerome Glisse2012-12-201-0/+2
* r600g: add in-place DB decompression and texturing with DB tilingMarek Olšák2012-11-061-3/+7
* r600g: use SQ_VTX_SEMANTIC_CLEAR to clear the semantic registersMarek Olšák2012-10-311-0/+1
* r600g: implement texturing with 8x MSAA compressed surfaces for EvergreenMarek Olšák2012-10-291-1/+1
* r600g/compute: always CONTEXT_CONTROL packet at start of CSAlex Deucher2012-10-261-0/+1
* r600g: Add register field definitions for 028C70_RESOURCE_TYPETom Stellard2012-10-011-0/+7
* r600g: use invalid DB hardware formats to disable depth/stencilMarek Olšák2012-09-271-0/+2
* r600g: add support for geometry shader samplers and constant buffersMarek Olšák2012-09-131-0/+2
* r600g: simplify flushingMarek Olšák2012-09-131-5/+2
* r600g: adjust QUANT_MODE for higher precisionVadim Girlin2012-09-041-0/+11
* r600g: implement MSAA for CaymanMarek Olšák2012-08-311-0/+21
* r600g: implement compression for MSAA colorbuffers for evergreenMarek Olšák2012-08-271-9/+67
* r600g: implement MSAA rendering and texturing for evergreen and caymanMarek Olšák2012-08-151-2/+22
* r600g: implement alpha-to-coverageMarek Olšák2012-08-151-0/+7
* r600g: Add helper functions for emitting compute SET_CONTEXT packetsTom Stellard2012-07-271-5/+0
* r600g: set DISABLE in CB_COLOR_CONTROL if colormask is 0Marek Olšák2012-07-121-0/+2
* r600g: enable DUAL_EXPORT mode when possibleVadim Girlin2012-06-271-0/+7
* r600g: Compute support for CaymanTom Stellard2012-06-061-0/+3
* r600g: compute support for evergreenAdam Rak2012-06-011-0/+74
* r600g: Fix the evergreen offset/end register definitionsTom Stellard2012-05-021-9/+5
* r600g: use SX_MISC to implement rasterizer discardMarek Olšák2012-03-081-0/+3
* r600g: initialize VS_GS_OUT_PRIM_TYPEMarek Olšák2012-03-051-0/+5
* r600g: initialize SX_SURFACE_SYNCMarek Olšák2012-03-051-0/+2
* r600g: rework scissor for evergreenMarek Olšák2012-03-051-0/+2
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