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path: root/src/gallium/drivers/r600/evergreen_state.c
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* r600g,radeonsi: add debug option which forces DMA for copy_region and blitMarek Olšák2014-09-121-1/+1
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* r600g,radeonsi: force fast stencil and HTILE stencil off, fixing a Hyper-Z hangMarek Olšák2014-09-011-1/+4
| | | | | | | | | | | | | This should be as fast as no HTILE for stencil. I think we can still get full performance with depth-only rendering even if stencil is present in the buffer but not used, but I'm not 100% sure. This may be revisited when HiS and fast stencil clear are implemented. This fixes a hang in Brutal Legend. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64471 Reviewed-by: Michel Dänzer <[email protected]>
* r600g: use HTILE allocator from SIMarek Olšák2014-09-011-3/+2
| | | | | | | | | | | | It's almost the same. This enables tiling for HTILE. It also enables Hyper-Z for other texture targets (1D, 1D_ARRAY, 2D_ARRAY, CUBE, CUBE_ARRAY, 3D, RECT). 2D array depth textures are tested by Unigine Sanctuary and my new piglit test. Acked-by: Michel Dänzer <[email protected]>
* r600g: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX for EG/CM, inline other fieldsMarek Olšák2014-09-011-9/+12
| | | | | | | | This fixes rendering to non-zero layer/face/slice with HTILE. v2: added the assertion Reviewed-by: Michel Dänzer <[email protected]>
* r600g: Implement sm5 geometry shader instancingGlenn Kennard2014-09-011-2/+2
| | | | | | Requires Evergreen or later hardware. Signed-off-by: Glenn Kennard <[email protected]>
* r600g: only set PIPE_BIND_BLENDABLE if colorbuffer rendering is supportedMarek Olšák2014-08-251-10/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for CaymanMarek Olšák2014-08-191-2/+0
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: implement invalidation of texture buffer objectsMarek Olšák2014-08-141-2/+7
| | | | | | This fixes piglit spec/ARB_texture_buffer_object/data-sync. Reviewed-by: Alex Deucher <[email protected]>
* r600g: clear constant buffer sizes at the beginning of CSMarek Olšák2014-08-141-68/+36
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: use gpu_address from r600_resourceMarek Olšák2014-08-091-27/+20
| | | | | Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: gpu_shader5 gl_SampleMaskIn supportGlenn Kennard2014-07-311-2/+8
| | | | | | | | Map TGSI_SEMANTIC_SAMPLEMASK to register/component. Enable face register when sample mask is needed by shader. Requires Evergreen/Cayman Reviewed-by: Alex Deucher <[email protected]>
* r600g: switch SNORM conversion to DX and GLES behaviorMarek Olšák2014-07-281-2/+0
| | | | | | | | | it also matches GL 4.2 further discussion: http://lists.freedesktop.org/archives/mesa-dev/2013-August/042680.html Cc: [email protected]
* radeon: add basic register setup for per-sample shadingMarek Olšák2014-06-021-4/+2
| | | | Only for Cayman, SI, CIK.
* radeon: split cayman_emit_msaa_state into 2 functionsMarek Olšák2014-06-021-1/+2
| | | | The other function will be split up from the framebuffer state.
* r600g: use TGSI_PROPERTY to disable viewport and clippingChristoph Bumiller2014-06-021-2/+11
| | | | | | | | | | v2 get rid of magic value, use DEFINES v3 update clip_disable together with vs_position_window_space Big thanks to Marek Olšák! Signed-off-by: David Heidelberger <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g: check for PIPE_BIND_BLENDABLE in is_format_supportedChristoph Bumiller2014-06-021-0/+9
| | | | | | v2: added !util_format_is_depth_or_stencil(format) Signed-off-by: Marek Olšák <[email protected]>
* r600g: simplify framebuffer state size computationMarek Olšák2014-05-101-26/+4
| | | | | | Take the upper bound. The number doesn't have to absolutely correct, only safe. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: fix hang on RV740 by using DX_RASTERIZATION_KILL instead of SX_MISCMarek Olšák2014-04-251-4/+8
| | | | | | | | Changing SX_MISC hangs RV740. When we're at it, let's use DX_RASTERIZATION_KILL on all R700 and later chipsets. Cc: 10.0 10.1 [email protected] Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix for an MSAA hang on RV770Marek Olšák2014-04-251-1/+4
| | | | | Cc: 10.0 10.1 [email protected] Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix for broken CULL_FRONT behavior on R6xxMarek Olšák2014-04-251-24/+0
| | | | | Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* r600g: use more appropriate names for async DMA functionsMarek Olšák2014-03-201-4/+4
| | | | | | *_dma_copy calls either *_dma_copy_buffer or *_dma_copy_tile. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: deobfuscate async DMA codeMarek Olšák2014-03-201-10/+10
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g: don't flush the gfx IB explicitly before doing DMAMarek Olšák2014-03-201-3/+0
| | | | | | It's flushed by calling r600_context_bo_reloc. Reviewed-by: Michel Dänzer <[email protected]>
* radeon: Move r600_need_dma_space to common codeNiels Ole Salscheider2014-03-201-1/+1
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g,radeonsi: use a fallback in dma_copy instead of failingMarek Olšák2014-03-111-18/+22
| | | | | | v2: - allow byte-aligned DMA buffer copies on Evergreen - fix piglit/texsubimage regression - use the fallback for 3D copies (depth > 1) as well
* r600g, radeonsi: fix primitives-generated query with disabled streamoutMarek Olšák2014-03-111-6/+3
| | | | | | | | | | | | | | | | | Buffers are disabled by VGT_STRMOUT_BUFFER_CONFIG, but the query only works if VGT_STRMOUT_CONFIG.STREAMOUT_0_EN is enabled. This moves VGT_STRMOUT_CONFIG to its own state. The register is set to 1 if either streamout or the primitives-generated query is enabled. However, the primitives-emitted query is also incremented, so it's disabled by setting VGT_STRMOUT_BUFFER_SIZE to 0 when there is no buffer bound. This fixes piglit: ARB_transform_feedback2/counting with pause EXT_transform_feedback/primgen-query transform-feedback-disabled Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: move CMASK register values from r600_surface to r600_textureMarek Olšák2014-03-111-18/+7
| | | | | | | | | | | When doing fast clear for single-sample color buffers for the first time, a CMASK buffer has to be allocated and the CMASK state in all pipe_surfaces referencing the color buffer must be updated. Updating all surfaces is kinda silly, so let's move the values to r600_texture instead. This is only for Evergreen and later. R600-R700 don't have fast clear. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: move cayman MSAA setup to a common placeMarek Olšák2014-03-111-207/+12
| | | | | | I will use this in radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: set priorities for relocationsMarek Olšák2014-03-111-14/+36
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* r600g: fix blitting the last 2 mipmap levels for EvergreenMarek Olšák2014-03-071-11/+29
| | | | | | | | This fixes a lot of compressedteximage piglit tests. R600-R700 don't have this issue. Cc: [email protected]
* r600g: implement edge flagsMarek Olšák2014-03-041-0/+1
| | | | | Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* r600g: port color buffer format conversion from radeonsiMarek Olšák2014-03-041-458/+6
| | | | | | | | | | | | r600_translate_colorformat is rewritten to look like radeonsi. r600_translate_colorswap is shared with radeonsi. r600_colorformat_endian_swap is consolidated. This adds some formats which were missing. Future "plain" formats will automatically be supported. Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* r600g: remove r600_surface::htile_enabledMarek Olšák2014-02-251-4/+2
| | | | | | v2: use one of the htile registers instead Reviewed-by: Michel Dänzer <[email protected]>
* r600g: use r600_surface::db_z_infoMarek Olšák2014-02-251-10/+10
| | | | | | | | | | db_z_info was unused. This just renames the variable to match the register name. Now, db_depth_info is unused on Evergreen. Both variables will be needed on SI though. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: add support for multiple viewports.Dave Airlie2014-02-111-13/+28
| | | | | | tested on rv635 and barts. Signed-off-by: Dave Airlie <[email protected]>
* r600g: port the layered surface rendering patch from radeonsiDave Airlie2014-02-051-9/+9
| | | | | | | | | This just makes r600 and evergreen do what the radeonsi codepaths do for layered rendering. This makes the 2d amd_vertex_shader_layer test pass on evergreen. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: initial VS output layer supportDave Airlie2014-02-051-1/+2
| | | | | | | This just adds support for emitting the proper value in the VS out misc. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: calculate correct cut valueDave Airlie2014-02-051-1/+11
| | | | | | | This selects the cut value depending on the shader selected. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: write proper output prim typeDave Airlie2014-02-051-1/+26
| | | | | | | | Vadim's code derived it from the info.mode, but it needs to be takes from the geometry shader output primitive. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: enable instance cnt register with new enough kernelDave Airlie2014-02-051-6/+6
| | | | | | | | The instance cnt register was missing for a few kernels, with a new enough kernel we can output it. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: add primitive input support for gsDave Airlie2014-02-051-1/+5
| | | | | | | only enable prim id if gs uses it Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: initialise the geom shader loop registers.Dave Airlie2014-02-051-0/+2
| | | | | | | As we do for vertex and pixel shaders. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: initial support for geometry shaders on evergreen (v2)Vadim Girlin2014-02-051-8/+146
| | | | | | | | | | | | | | This is Vadim's initial work with a few regression fixes squashed in. v2: (airlied) fix regression in glsl-max-varyings - need to use vs and ps_dirty fix regression in shader exports from rebasing. whitespace fixing. v2.1: squash fix assert Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: defer shader variant selection and depending state updatesVadim Girlin2014-02-051-1/+0
| | | | | | | | [airlied: fix dropped streamout line - fix for master] Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: handle NULL colorbuffers correctly on EvergreenMarek Olšák2014-01-131-24/+35
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* radeon: rearrange r600_texture and related code a bit.Andreas Hartmetz2013-12-121-5/+5
| | | | | This should make the differences and similarities between color and depth buffer handling more clear.
* r600g,radeonsi: share flags has_cp_dma and has_streamoutMarek Olšák2013-12-121-2/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g: use common interfaces in buffer_transfer_unmapMarek Olšák2013-12-121-0/+6
| | | | | | i.e. dma_copy and resource_copy_region. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: properly expose texture buffer formatsMarek Olšák2013-11-041-3/+8
| | | | This exposes GL_ARB_texture_buffer_object_rgb32.
* r600g: fix crash in set_framebuffer_stateGrigori Goronzy2013-10-111-8/+15
| | | | | | | | We should be able to safely set the framebuffer state without a fragment shader bound. bind_ps_state will take care of updating the necessary state bits later. v2: check in update_db_shader_control
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