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* r600g: remove obsolete todo commentsMarek Olšák2012-03-051-1/+1
| | | | | | | | Also use XXX in the other ones, because it's the most used word for that purpose in Mesa. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: improve kcache line sets handling v2Vadim Girlin2012-01-211-1/+48
| | | | | | | | | Add support for multiple kcache banks (constant buffers). Lock the required lines only. Allow up to 4 kcache line sets in the alu clause by using ALU_EXTENDED on eg+. Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix the representation of control-flow instructionsMarek Olšák2011-11-151-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | We need something that looks like a compiler and not like some hacker put some functions together. /rant This is a band-aid for these two problems: - The R600 and EG control-flow instructions appear in switch statements next to each other, causing conflicts when adding new instructions. - The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29 to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST is 22:29. To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23, or 26 (directly in the definitions), such that it can be just or'd when making bytecode without any shifting. All switch statements have been divided into two, one for R600 and the other for EG. Of course, there is a better way to do this, but that is left for future work. Tested on RV730 and REDWOOD with no regressions. v2: minor cleanup as per Alex's comment. Reviewed-by: Alex Deucher <[email protected]>
* r600g: add initial evergreen supportDave Airlie2010-09-101-0/+485
adds shader opcodes + assembler support (except ARL) uses constant buffers add interp instructions in fragment shader adds all evergreen hw states adds evergreen pm4 support. this runs gears for me on my evergreen