| Commit message (Collapse) | Author | Age | Files | Lines |
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These are optimizations which make MSAA a lot faster.
The MSAA work is complete with this commit. (except for enablement of AA
optimizations for RGBA16F, for which a patch is ready and waiting until
the kernel CS checker fix lands)
MSAA can't be made any faster as far as hw programming is concerned.
The catch is only one process and one colorbuffer can use the optimizations
at a time. There usually is only one MSAA colorbuffer, so it shouldn't be
an issue.
Also, there is a limit on the size of MSAA colorbuffer resolution in terms
of megapixels. If the limit is surpassed, the AA optimizations are disabled.
The limit is:
- 1 Mpix on low-end and some mid-level chipsets (1024x768 and 1280x720)
- 2 Mpix on some mid-level chipsets (1600x1200 and 1920x1080)
- 3 or 4 Mpix on high-end chipsets (2048x1536 or 2560x1600, respectively)
It corresponds to the number of raster pipes (= GB pipes) available, each pipe
can hold 1 Mpix of AA compression data.
If it's enabled, the driver prints to stdout:
radeon: Acquired access to AA optimizations.
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Set: RADEON_DEBUG=msaa
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And renumber the options.
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This also removes DBG_STATS (the stats can be obtained with valgrind instead).
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Those are:
- dead-code elimination
- constant folding
- peephole (mainly copy propagation)
- register allocation
There are some bugs which I need to track down.
Also fix up the descriptions of all the debug options.
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This implements fast Z clear, Z compression, and HiZ support for r300->r500
GPUs.
It also allows cbzb clears when fast Z clears are being used for the ZB.
It requires a kernel with hyper-z support.
Thanks to Marek Olšák <[email protected]>, who started this off, and Alex Deucher at AMD for providing lots of hints.
v2:
squashed zmask ram size fix]
squashed r300g/blitter: fix Z readback when compressed]
v3:
rebase around texture changes in master - .1 fix more bits
v4:
migrated to using u_mm in r300_texture to manage hiz/zmask rams consistently
disabled HiZ when using OQ
flush z-cache before turning hyper-z off
update hyper-z state on dsa state change
store depthclearvalue across cbzb clears and replace it afterwards.
Signed-off-by: Dave Airlie <[email protected]>
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I'd like the CS macros to be as lightweight as possible for performance
reasons.
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Shows what's actually going on in the RS block.
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notiling = Disable texture tiling
noimmd = Disable immediate mode (this optimization was really worth it!)
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We really need to get these into bug reports.
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Oh look, an undocumented feature. It's a nice tool for benchmarking
texturing.
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Cleared out my git stash.
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It gets really annoying watching r300g tell me how it's filling surfaces.
Or falling back during filling surfaces.
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So I didn't touch r300compiler, but r300g now compiles after having
declarations and code untangled. As nha so gently points out, we shouldn't
have to do this just to comply with MSVC compilers.
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So that debugging is no longer a full-spam-or-nothing approach, you are now
supposed to set the RADEON_DEBUG environment flag just like for classic Mesa.
The available debug flags are different, however. Just running an OpenGL
application with RADEON_DEBUG set to an arbitrary string will print out
helpful information.
Everything must be compiled with -DDEBUG for any of this to work
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This is entirely untested on R500, and needs more testing on R300.
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Appart from separating r3xx/r5xx fragment shaders, a more consistent
naming scheme has been applied. From now on:
r300 = all chips
r3xx = R300/R400 only
r5xx = R500 only
This way r300_fragment_shader is the master struct, and the structs
r3xx_fragment_shader and r5xx_fragment_shader inherits it.
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Still not showing me why my stuff's failing, but getting there.
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Doesn't work. WTF.
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It was driving me crazy.
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