| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | nvc0/ir: try to fix CAS (CompareAndSwap) | Christoph Bumiller | 2013-03-12 | 2 | -1/+42 |
| * | nv50/ir: add CCTL (cache control) op | Christoph Bumiller | 2013-03-12 | 1 | -0/+25 |
| * | nvc0/ir/emit: fix emission of large address offsets | Christoph Bumiller | 2013-03-12 | 1 | -8/+50 |
| * | nv50/ir: add support for different sampler and resource index on nve4 | Christoph Bumiller | 2013-03-12 | 1 | -37/+22 |
| * | nv50/ir: implement splitting of 64 bit ops after RA | Christoph Bumiller | 2013-03-12 | 1 | -19/+12 |
| * | nvc0/ir: skip back edges when determining latest sched value | Christoph Bumiller | 2013-03-12 | 1 | -3/+4 |
| * | nvc0/ir: use large issue delay after RET, too | Christoph Bumiller | 2013-03-12 | 1 | -1/+1 |
| * | nv50/ir: add support for barriers | Christoph Bumiller | 2013-03-12 | 1 | -0/+96 |
| * | nvc0/ir: don't replace load from input in COMPUTE progs with VFETCH | Christoph Bumiller | 2013-03-12 | 1 | -2/+7 |
| * | nvc0/ir: implement lowering of surface ops for nve4 | Christoph Bumiller | 2013-03-12 | 1 | -2/+380 |
| * | nvc0/ir: add formatted surface load lib code, move to extra header | Christoph Bumiller | 2013-03-12 | 6 | -149/+1309 |
| * | nvc0/ir: lower atomics in s[] | Christoph Bumiller | 2013-03-12 | 1 | -0/+33 |
| * | nvc0/ir/emit: implement INSBF, EXTBF, PERMT and ATOM | Christoph Bumiller | 2013-03-12 | 2 | -1/+133 |
| * | nvc0/ir/target: some ops can't be predicated, e.g. CALL | Christoph Bumiller | 2013-03-12 | 1 | -0/+8 |
| * | nv50/ir: add support for indirect BRA,CALL | Christoph Bumiller | 2013-03-12 | 1 | -2/+17 |
| * | nvc0/ir/emit: implement move to and logic ops on predicates | Christoph Bumiller | 2013-03-12 | 1 | -0/+45 |
| * | nvc0/ir/emit: implement surface related ops | Christoph Bumiller | 2013-03-12 | 2 | -0/+301 |
| * | nv50/ir: initialize CodeEmitters' specialized target fields | Christoph Bumiller | 2013-03-12 | 2 | -6/+6 |
| * | nv50/ir: add various new OPs that will be needed for compute | Christoph Bumiller | 2013-03-12 | 1 | -3/+4 |
| * | nv50/ir: Rename "mkLoad" to "mkLoadv" for consistency. | Francisco Jerez | 2013-03-12 | 1 | -2/+2 |
| * | nv50/nvc0: Build codegen in nv50. | Johannes Obermayr | 2013-01-12 | 1 | -1/+1 |
| * | nvc0/ir: allow neg,abs modifiers on OP_SET with integer result | Christoph Bumiller | 2012-12-08 | 1 | -0/+4 |
| * | nvc0/ir/emit: fix check for flags register use in logic ops | Christoph Bumiller | 2012-12-08 | 1 | -3/+3 |
| * | nv50,nvc0: add support for cube map arrays | Christoph Bumiller | 2012-12-07 | 2 | -2/+0 |
| * | nvc0/ir: add initial code to support GK110 ISA encoding | Christoph Bumiller | 2012-09-07 | 5 | -13/+1658 |
| * | nvc0/ir: allow 64-bit constant loads on nve4 | Christoph Bumiller | 2012-05-29 | 1 | -1/+1 |
| * | nvc0/ir: fix texture barrier insertion to prevent WAW hazards | Christoph Bumiller | 2012-05-29 | 2 | -21/+78 |
| * | nv50/ir: fix reversed order of lane ops in quadops | Christoph Bumiller | 2012-05-17 | 1 | -2/+3 |
| * | nvc0/ir: allow abs,neg source modifiers with ceil,floor,trunc | Christoph Bumiller | 2012-05-06 | 1 | -0/+3 |
| * | nvc0/ir: fix lowering of textureGrad | Christoph Bumiller | 2012-05-06 | 2 | -8/+9 |
| * | nv50/ir/opt: try to convert ABS(SUB) to SAD | Christoph Bumiller | 2012-04-29 | 2 | -1/+17 |
| * | nvc0/ir: try to use the optimal texture op mode | Christoph Bumiller | 2012-04-29 | 1 | -3/+15 |
| * | nvc0/ir: initial implementation of nve4 scheduling hints | Christoph Bumiller | 2012-04-29 | 3 | -11/+597 |
| * | nvc0/ir: implement better placement of texture barriers | Christoph Bumiller | 2012-04-29 | 1 | -7/+269 |
| * | nvc0/ir/emit: fix emitTXQ 2nd src | Christoph Bumiller | 2012-04-29 | 1 | -1/+3 |
| * | nvc0/ir/target: integer ADD doesn't support ABS modifier | Christoph Bumiller | 2012-04-29 | 1 | -0/+2 |
| * | nvc0: add initial support for nve4+ (Kepler) chipsets | Christoph Bumiller | 2012-04-15 | 3 | -25/+110 |
| * | nv50/ir: import nv50 target | Christoph Bumiller | 2012-04-14 | 1 | -1/+1 |
| * | nv50/ir: fix off-by-ones in CSE and nvc0 insnCanLoad | Christoph Bumiller | 2012-04-14 | 1 | -1/+1 |
| * | nv50/ir: rewrite the register allocator as GCRA, with spilling | Christoph Bumiller | 2012-04-14 | 1 | -4/+2 |
| * | nvc0: fix emission of 3rd src in SET_AND,OR,XOR | Christoph Bumiller | 2012-04-14 | 1 | -0/+3 |
| * | nv50/ir: Decouple object cloning logic from the sub-object recursion policy. | Francisco Jerez | 2012-04-14 | 1 | -2/+2 |
| * | nv50/ir: make Instruction::src/def container private | Christoph Bumiller | 2012-04-14 | 3 | -165/+171 |
| * | nv50/ir/opt: improve post-multiply and check target for support | Christoph Bumiller | 2012-04-14 | 2 | -0/+13 |
| * | nv50/ir: add isAccessSupported check for memory access coalescing | Christoph Bumiller | 2012-04-14 | 3 | -1/+12 |
| * | nv50/ir: make use of TGSI_INTERPOLATE_COLOR | Christoph Bumiller | 2012-01-12 | 1 | -5/+0 |
| * | nvc0/ir: TXF array index already is an integer | Christoph Bumiller | 2012-01-10 | 1 | -3/+6 |
| * | nvc0/ir/emit: fix modifiers of f32 add with long immediate | Christoph Bumiller | 2012-01-10 | 1 | -5/+11 |
| * | nvc0/ir: fix default insertion position in pre-SSA lowering pass | Christoph Bumiller | 2012-01-10 | 1 | -7/+1 |
| * | nv50/ir: use RDSV to fetch FrontFacing before lowering | Christoph Bumiller | 2011-10-21 | 1 | -13/+11 |
