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* nv50: enable all 32 threads of a warpChristoph Bumiller2009-11-071-1/+3
| | | | | This should be the default setting. See also 7d967b9b7c08aea2a471c5bf6aced8bfafdae874.
* nv50: fix shader emit_tex for cube texturesChristoph Bumiller2009-11-041-14/+36
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* nv50: add abs-modifier for emit_minmaxChristoph Bumiller2009-11-041-17/+31
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* nv50: add 3d texture tiling and mip-mappingChristoph Bumiller2009-11-044-37/+114
| | | | | | | | | Mip-mapped 3D textures are not arrays of 2D layers with a mip-map layout like 2D textures, therefore we cannot use image_nr == depth for them. Making use of "volume tiling" modes now, the allowed modes are 0xZY where Z <= 5 and y <= 5.
* nv50: handle TGSI_SEMANTIC_FACEChristoph Bumiller2009-11-011-0/+25
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* nv50: make IF condition safeChristoph Bumiller2009-11-011-1/+3
| | | | | Don't assume that a SET that writes to IF's argument directly precedes the IF.
* nv50: implement TGSI_OPCODE_AND/OR/XORChristoph Bumiller2009-11-011-0/+47
| | | | | Will use AND for gl_FrontFacing, the face input is either 0 or 0xffffffff.
* nv50: fix textures with block size != cppChristoph Bumiller2009-10-312-37/+48
| | | | | | | | | | | First, using width * block size as pitch is evidently wrong if a block contains more than 1 texel. For tiled textures, since a block occupies a contiguous area of memory, y addressing in m2mf has to be done by block index, not the y coordinate itself. This should fix compressed textures.
* nv50: use SIFC also for shader uploadChristoph Bumiller2009-10-313-56/+120
| | | | Adds a more generic SIFC transfer function.
* nv50: make MRTs workChristoph Bumiller2009-10-312-0/+15
| | | | | | | We have to indicate to the hw whether the FP exports multiple colour results. Method 0x121c is used to specify the number of RTs. Also deactivate zeta explicitly if there's no zsbuf.
* nv50: activate more lanes in a warpChristoph Bumiller2009-10-281-0/+4
| | | | | | | | Some cards have crippling defaults set and use only 4 of 32 lanes. This should activate 16 on these. Those that allow 32 by default should still do so. Found out by Marcin Kościelnicki.
* nv50: do SIGN_SET as one instructionChristoph Bumiller2009-10-231-6/+1
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* nv50: fix saturation outside of tx_insn caseChristoph Bumiller2009-10-231-3/+5
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* nv50: allow all 127 TEMP regsChristoph Bumiller2009-10-231-3/+16
| | | | We should really learn to not waste so many though.
* nv50: fix address reg codeChristoph Bumiller2009-10-231-23/+44
| | | | | Contained some rather obvious thinking errors before, and didn't consider offsets from TGSI ADDRESS regs.
* nv50: add depth texture formats, and a few others, tooChristoph Bumiller2009-10-234-32/+76
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* gallium: remove the swizzling parts of ExtSwizzleKeith Whitwell2009-10-231-20/+8
| | | | | | | | | These haven't been used by the mesa state tracker since the conversion to tgsi_ureg, and it seems that none of the other state trackers are using it either. This helps simplify one of the biggest suprises when starting off with TGSI shaders.
* nv50: handle PIPE_TEX_FILTER_ANISO caseChristoph Bumiller2009-10-222-15/+13
| | | | | Set the same bits as for linear filtering (in addition to max anisotropy), and 2 unknown bits I've seen set.
* nv50: support 3D class 0x8597, remove redundant unknown chipset detectionBen Skeggs2009-10-221-7/+10
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* nv50: add support for address regsChristoph Bumiller2009-10-192-13/+175
| | | | | Allow indirect uniform access and increase the limit on parameters from 128 to 512.
* nv50: cleanup emit_kilChristoph Bumiller2009-10-191-11/+7
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* nv50: implement TGSI_OPCODE_CMPChristoph Bumiller2009-10-191-2/+16
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* nv50: quick fix for insn src negationChristoph Bumiller2009-10-191-2/+23
| | | | | | | | | We only have a per nv50_reg negation flag, if an nv50_reg is used more than once in a TGSI op with different sign modes, we'd generate wrong code. We probably can't do much better without more invasive changes.
* nv50: add support for DDX and DDY opcodesChristoph Bumiller2009-10-191-14/+56
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* nv50: submit user vbo data through the fifoChristoph Bumiller2009-10-192-18/+394
| | | | | | Requesting a new real buffer from the kernel and copying all the data is wasteful e.g. if only a few (but widely spread) vertices are accessed.
* nv50: use SIFC for TIC, TSC uploadChristoph Bumiller2009-10-196-52/+77
| | | | | | | Add proper flushes for TIC and TSC and remove the costly 2D.0110 flush in nv50_flush. Correct TIC and TSC bo sizes.
* nv50: nicer texture format switchChristoph Bumiller2009-10-191-95/+49
| | | | Similar to nv40.
* nouveau: implement is_{texture,buffer}_referenced properlyBen Skeggs2009-10-192-25/+3
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* drm/nv50: write tic/tsc setup to correct slots when skipping unitsBen Skeggs2009-10-192-6/+8
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* nv50: fix segfault when there's gaps in enabled texture unitsBen Skeggs2009-10-062-4/+10
| | | | Tested with progs/demos/multiarb.
* nv50: support PIPE_FORMAT_X8R8G8B8_UNORMBen Skeggs2009-10-053-0/+12
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* gallium: Preparations for adding more PIPE_TRANSFER_* usage flags.Michel Dänzer2009-10-021-2/+2
| | | | | | Always test for PIPE_TRANSFER_READ/WRITE using the bit-wise and operator, and add a pipe_transfer_buffer_flags() helper for getting the buffer usage flags corresponding to them.
* nv50: fix TEX for WriteMask not equal 0xfChristoph Bumiller2009-09-251-4/+5
| | | | | If you e.g. only need alpha, it ends up in the first reg, not the last, as it would when reading rgb too.
* nv50: actually enable view volume clippingChristoph Bumiller2009-09-251-1/+10
| | | | | | | Until now, only primitives wholly outside the view volume were not drawn. This was only visibile when using a viewport smaller than the window size, naturally.
* nv50: RCP and RSQ cannot load from VP inputsChristoph Bumiller2009-09-251-1/+21
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* nv50: fix CEIL and TRUNCChristoph Bumiller2009-09-251-4/+5
| | | | Separated the integer rounding mode flag for cvt.
* nv50: implement BGNLOOP, BRK, ENDLOOPChristoph Bumiller2009-09-251-2/+75
| | | | | | There's a good chance a loop won't execute correctly though since our TEMP allocation assumes programs to be executed linearly. Will fix later.
* nv50: implement IF, ELSE, ENDIF opcodesChristoph Bumiller2009-09-251-42/+146
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* gallium: Deprecate PIPE_CAP_S3TC.José Fonseca2009-09-161-2/+0
| | | | | No longer used. S3TC support is queried via pipe_screen::is_format_supported.
* nv50: avoid excessive FIRE_RINGMaarten Maathuis2009-09-151-2/+3
| | | | - And reduce RING_SPACE to 2, instead of 3.
* nv50: use flush_notify to reduce number of relocsMaarten Maathuis2009-09-153-0/+10
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* nv50: fix stupid thinko in emit_setChristoph Bumiller2009-09-151-1/+3
| | | | | | | When swapping sources 0 and 1, EQ of course does *not* become NE, etc. Introduced in 2b963f5c723401aa2646bd48eefe065cd335e280.
* nv50: let programs use the whole param bufferChristoph Bumiller2009-09-152-43/+29
| | | | | Allocation is unnecessary since all uniforms are uploaded on every constant buffer change anyway.
* nv50: add preliminary support for point spritesChristoph Bumiller2009-09-153-2/+58
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* nv50: add support for point size per vertexChristoph Bumiller2009-09-152-0/+15
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* nv50: add support for light-twosideChristoph Bumiller2009-09-152-0/+22
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* nv50: proper linkage between VP and FPChristoph Bumiller2009-09-154-161/+298
| | | | | | | | | | | | | | | | | | | | | This moves construction of the mapping between VP outputs and FP inputs into validation. The map also contains slots for special outputs like clip distance and point size, so we need to at least merge the VP related and FP related parts on validation if we want to support those. Now we match every single FP input component with results from the VP and leave those not read out of the map, or replace those not written by 0 (xyz) or 1 (w). The bitmap indicating linear interpolants is also filled, and flat FP inputs are mapped in only after non-flat ones, as is required. Furthermore, we can save some space by only fetching VP attrs we actually use, and avoid wasting any output regs because of TGSI using less than 4 components.
* nv50: move allocation of pc regsChristoph Bumiller2009-09-151-155/+129
| | | | | Make use of tgsi_shader_info to determine how many nv50_regs we need to allocate, whether program uses KIL, or writes DEPR.
* nv50: nicer initialization of nv50_regsChristoph Bumiller2009-09-151-51/+42
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* nv50: handle CEIL and TRUNC opcodesChristoph Bumiller2009-09-151-0/+16
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