| Commit message (Expand) | Author | Age | Files | Lines |
* | nv50/ir: start LocalCSE with getFirst to merge PHI instructions | Karol Herbst | 2016-10-25 | 1 | -1/+1 |
* | nvc0: use correct bufctx when invalidating CP textures | Samuel Pitoiset | 2016-10-25 | 1 | -1/+1 |
* | nv50/ir: do not perform global membar for shared memory | Samuel Pitoiset | 2016-10-24 | 1 | -1/+4 |
* | nv50/ir: display OP_BAR subops in debug mode | Samuel Pitoiset | 2016-10-24 | 1 | -0/+9 |
* | nv50/ir: it appears that OP_DISCARD can't take a join modifier | Ilia Mirkin | 2016-10-22 | 1 | -0/+1 |
* | nv50/ir: use levelZero for non-frag tex/txp ops | Ilia Mirkin | 2016-10-22 | 1 | -0/+5 |
* | gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS | Ilia Mirkin | 2016-10-22 | 3 | -0/+3 |
* | nvc0/ir: remove outdated comment about SHLADD | Samuel Pitoiset | 2016-10-22 | 2 | -2/+0 |
* | nv50,nvc0: don't keep track of whether fb rt0 is integer-only | Ilia Mirkin | 2016-10-21 | 6 | -44/+22 |
* | nvc0: do not break 3D state by pushing MS coordinates on Fermi | Samuel Pitoiset | 2016-10-20 | 1 | -43/+44 |
* | nvc0: translate compute shaders at program creation | Samuel Pitoiset | 2016-10-20 | 1 | -0/+4 |
* | nv50/ir: process texture offset sources as regular sources | Ilia Mirkin | 2016-10-19 | 1 | -53/+94 |
* | nv50,nvc0: avoid reading out of bounds when getting bogus so info | Ilia Mirkin | 2016-10-19 | 2 | -2/+8 |
* | nvc0/ir: simplify predicate logic for GK104 atomic operations | Samuel Pitoiset | 2016-10-19 | 1 | -14/+7 |
* | nvc0/ir: remove useless NVC0LoweringPass::gMemBase | Samuel Pitoiset | 2016-10-19 | 1 | -4/+1 |
* | nv50/ir: print CCTL subops in debug mode | Samuel Pitoiset | 2016-10-19 | 1 | -0/+9 |
* | nv50/ir: silent TGSI_PROPERTY_FS_DEPTH_LAYOUT | Samuel Pitoiset | 2016-10-19 | 1 | -0/+1 |
* | gm107/ir: fix bit offset of tex lod setting for indirect texturing | Ilia Mirkin | 2016-10-18 | 1 | -1/+1 |
* | gm107/ir: fix texturing with indirect samplers | Ilia Mirkin | 2016-10-18 | 1 | -0/+10 |
* | nv50/ir: constant fold OP_SPLIT | Tobias Klausmann | 2016-10-14 | 1 | -0/+18 |
* | nv50: enable ARB_enhanced_layouts | Ilia Mirkin | 2016-10-13 | 1 | -1/+1 |
* | nvc0/ir: be more careful about preserving modifiers in SHLADD creation | Ilia Mirkin | 2016-10-13 | 1 | -7/+5 |
* | nvc0: enable ARB_enhanced_layouts | Samuel Pitoiset | 2016-10-13 | 1 | -1/+1 |
* | nvc0/ir: fix textureGather with a single offset | Ilia Mirkin | 2016-10-12 | 1 | -2/+2 |
* | nv50/ir: copy over value's register id when resolving merge of a phi | Ilia Mirkin | 2016-10-12 | 1 | -1/+3 |
* | gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTS | Nicolai Hähnle | 2016-10-12 | 3 | -0/+3 |
* | nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c) | Samuel Pitoiset | 2016-10-12 | 1 | -0/+87 |
* | nvc0: fix valid range for shader buffers | Samuel Pitoiset | 2016-10-10 | 3 | -0/+3 |
* | nvc0/ir: fix overwriting of value backing non-constant gather offset | Ilia Mirkin | 2016-10-10 | 1 | -2/+2 |
* | nv50/ir: only stick one preret per function | Ilia Mirkin | 2016-10-10 | 1 | -4/+7 |
* | nv50/ir: fix wrong check when optimizing MAD to SHLADD | Samuel Pitoiset | 2016-10-07 | 1 | -1/+1 |
* | nvc0: dump program binary only when NV50_PROG_DEBUG is set | Samuel Pitoiset | 2016-10-07 | 1 | -1/+1 |
* | nvc0: expose ARB_compute_variable_group_size | Samuel Pitoiset | 2016-10-07 | 1 | -2/+6 |
* | nv50/ir: set number of threads/block for variable local size | Samuel Pitoiset | 2016-10-07 | 1 | -0/+2 |
* | gallium: add PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK | Samuel Pitoiset | 2016-10-07 | 2 | -0/+4 |
* | nv50/ir: optimize sub(a, 0) to a | Karol Herbst | 2016-10-06 | 1 | -0/+3 |
* | nvc0: dump program binary when chipset has been forced | Samuel Pitoiset | 2016-10-05 | 1 | -0/+5 |
* | nv50/ra: let simplify return an error and handle that | Karol Herbst | 2016-10-05 | 1 | -5/+7 |
* | nv50/ir: teach insnCanLoad() about SHLADD | Samuel Pitoiset | 2016-09-29 | 1 | -0/+2 |
* | nv50/ir: optimize SHLADD(a, b, c) to MOV((a << b) + c) | Samuel Pitoiset | 2016-09-29 | 1 | -0/+3 |
* | nv50/ir: optimize SHLADD(a, b, 0x0) to SHL(a, b) | Samuel Pitoiset | 2016-09-29 | 1 | -0/+8 |
* | nv50/ir: optimize IMAD to SHLADD in presence of power of 2 | Samuel Pitoiset | 2016-09-29 | 1 | -0/+7 |
* | nvc0/ir: add emission for SHLADD | Samuel Pitoiset | 2016-09-29 | 3 | -0/+127 |
* | nv50/ir: add preliminary support for SHLADD | Samuel Pitoiset | 2016-09-29 | 5 | -7/+17 |
* | nvc0: update GM107 sched control codes format | Samuel Pitoiset | 2016-09-29 | 2 | -23/+23 |
* | nv50/ir: fix comments about instructions info | Samuel Pitoiset | 2016-09-26 | 1 | -2/+3 |
* | nvc0: allow to force compiling programs in debug build | Samuel Pitoiset | 2016-09-26 | 1 | -9/+10 |
* | nv50/ir: drop unused NVISA_XXX_CHIPSET constants | Samuel Pitoiset | 2016-09-26 | 1 | -2/+0 |
* | nvc0: get rid of nvc0_stage_sampler_states_bind_range() | Samuel Pitoiset | 2016-09-19 | 1 | -74/+9 |
* | nvc0: get rid of nvc0_stage_set_sampler_views_range() | Samuel Pitoiset | 2016-09-19 | 1 | -89/+15 |