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* nvc0: implement clear_bufferTobias Klausmann2014-05-261-0/+141
* nvc0: revert mistaken logic to collapse color outputs to the beginningIlia Mirkin2014-05-261-9/+4
* nv50: count wrapped textures towards the tex_obj countJoakim Sindholt2014-05-231-0/+2
* nvc0: assert that we have vertex elements stateChristoph Bumiller2014-05-231-0/+1
* nvc0: use PRIxPTR for sizeof()Christoph Bumiller2014-05-231-1/+1
* nv50,nvc0: allow 15,16,30 bpp display formatsChristoph Bumiller2014-05-231-4/+4
* nv50,nvc0: handle guard band definesChristoph Bumiller2014-05-232-4/+16
* nv50/ir/tgsi: optimize KILChristoph Bumiller2014-05-231-0/+5
* nv50/ir: fix lowering of predicated instructions (without defs)Christoph Bumiller2014-05-231-1/+4
* nv50/ir/opt: fix constant folding with saturate modifierChristoph Bumiller2014-05-231-1/+3
* nv50/ir/tgsi: TGSI_OPCODE_POW replicates its resultChristoph Bumiller2014-05-231-1/+5
* nv50,nvc0: set constbufs dirty on pipe context switchChristoph Bumiller2014-05-232-0/+5
* nv50: setup scissors on clear_render_target/depth_stencilChristoph Bumiller2014-05-231-2/+18
* nv50,nvc0: always pull out bufctx on context destructionChristoph Bumiller2014-05-232-9/+7
* nv50,nvc0: fix 3d blits with mipmap levelsIlia Mirkin2014-05-212-11/+19
* nv50/ir: fix constant folding for OP_MUL subop HIGHIlia Mirkin2014-05-211-4/+43
* nv50/ir: fix s32 x s32 -> high s32 multiply logicIlia Mirkin2014-05-212-11/+82
* nv50/ir: fix integer mul lowering for u32 x u32 -> high u32Ilia Mirkin2014-05-181-3/+4
* nv50/ir: make sure that texprep/texquerylod's args get coalescedIlia Mirkin2014-05-181-0/+2
* nvc0: enable support for maxwell boardsBen Skeggs2014-05-155-19/+48
* nvc0: add maxwell (sm50) compiler backendBen Skeggs2014-05-1516-5/+3588
* nvc0: maxwell isa has no per-instruction join modifierBen Skeggs2014-05-154-19/+23
* nvc0: replace immd 0 with $rLASTGPR for emit/restart opcodesBen Skeggs2014-05-151-0/+1
* nvc0: move nvc0 lowering pass class definitions into headerBen Skeggs2014-05-153-106/+136
* nvc0: bump sched data member to 32-bitsBen Skeggs2014-05-151-1/+1
* nvc0: use vertex arrays for eng3d blitBen Skeggs2014-05-151-31/+64
* nvc0: restrict "constant vbo" logic to fermi/kepler classesBen Skeggs2014-05-151-1/+1
* nvc0: replace some vb->stride checks with constant_vbo insteadBen Skeggs2014-05-151-3/+3
* nvc0: add maxwell classBen Skeggs2014-05-152-0/+4
* nvc0: allow for easier modification of compiler library routinesBen Skeggs2014-05-1513-1057/+1057
* nvc0: properly distribute macros in source formBen Skeggs2014-05-155-244/+365
* nv50,nvc0: fix blit 3d path for 1d array texturesIlia Mirkin2014-05-111-0/+6
* nv50,nvc0: leave queries on during blit, turn them on for 2d engineIlia Mirkin2014-05-116-6/+35
* nv50: fix setting of texture ms info to be per-stageIlia Mirkin2014-05-113-6/+10
* nv50/ir: make sure to reverse cond codes on all the OP_SET variantsIlia Mirkin2014-05-111-1/+2
* nv50/ir/gk110: fix set with f32 destIlia Mirkin2014-05-071-0/+3
* nv50/ir: allow load propagation when flags are definedIlia Mirkin2014-05-071-3/+4
* gallium: add a cap for supporting 4-offset TG4 opcodesIlia Mirkin2014-05-073-0/+3
* nv50,nvc0: add X8Z24_UNORM, fix stencil-only formatsIlia Mirkin2014-05-041-3/+9
* nouveau: add ARB_buffer_storage supportIlia Mirkin2014-05-0210-5/+112
* nouveau: remove cb_dirty, it's never usedIlia Mirkin2014-05-022-4/+1
* nvc0: treat non-linear 2DRect textures the same as 2DIlia Mirkin2014-05-021-1/+1
* nvc0/ir: offset appears to come before the Z refIlia Mirkin2014-04-281-1/+3
* nv50/ir: change texture offsets to ValueRefs, allow nonconstIlia Mirkin2014-04-288-20/+61
* nvc0/ir: do constant folding of extbf/insbfIlia Mirkin2014-04-281-1/+66
* nvc0/ir: add support for MUL_HI tgsi opcodesIlia Mirkin2014-04-281-1/+12
* nvc0/ir: add support for new bitfield manipulation opcodesIlia Mirkin2014-04-287-4/+127
* nvc0/ir: fetch shadow value from proper place for TG4 cube arrayIlia Mirkin2014-04-261-1/+4
* nvc0/ir: set gatherComp for non-shadow targetsIlia Mirkin2014-04-261-0/+2
* nvc0/ir: set instance count based on the GS_INVOCATIONS propertyIlia Mirkin2014-04-261-3/+1