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* nv50/ir: fix emission of address reg in 3rd sourceIlia Mirkin2015-06-301-2/+6
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91056 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30: align transfer stride to 64, required by blit, sifm transfer implsIlia Mirkin2015-06-291-2/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: allow vertex state creation with 0 elementsIlia Mirkin2015-06-291-2/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: reset fragprog bufctx at bind timeIlia Mirkin2015-06-291-1/+8
| | | | | | | | A clear will do a partial validate, which will in turn reference all the buffers in the bufctx again. However the fragprog last validated might have already been deleted. So reset the bufctx when updating state. Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: modernize fp upload logicIlia Mirkin2015-06-291-10/+14
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: provide a minimum map buffer alignmentIlia Mirkin2015-06-291-1/+2
| | | | | | | Otherwise we return 0, which is out of spec. Return 64 like all the other nouveau drivers. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZEGrigori Goronzy2015-06-291-0/+4
| | | | | | | We need this to implement OpenCL's CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE. Reviewed-by: Francisco Jerez <[email protected]>
* nv30: avoid leaking blit fp/vpIlia Mirkin2015-06-291-0/+6
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv40: enable base vertexIlia Mirkin2015-06-293-4/+5
| | | | | | | Still appears to have issues with negative indices less than -1M, but that's a corner case of a corner case. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: propagate modifier to right arg when const-folding madIlia Mirkin2015-06-261-1/+4
| | | | | | | | | | An immediate has to be the second arg of an ADD operation. However we were mistakenly propagating the modifier of the non-folded value to the folded immediate argument. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91117 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* mesa: Enable subdir-objects globally.Matt Turner2015-06-261-2/+0
| | | | Reviewed-by: Emil Velikov <[email protected]>
* nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_dataIlia Mirkin2015-06-234-0/+4
| | | | | | | | | | | | Without first running the bo through pushbuf_refn, the nouveau drm library will have uninitialized structures regarding this bo, and will insert incorrect data. This fixes supertuxkart 0.9 crash on start (where it ends up doing a lot of indirect draws). Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nvc0: always put all tfb bufs into bufctxIlia Mirkin2015-06-231-3/+4
| | | | | | | | | | Since we clear the TFB bufctx binding point above, we need to put all of the active tfb's back in, even if they haven't changed since last time. Otherwise the tfb may get moved into sysmem and the underlying mapping will generate write errors. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nvc0: use NV_VRAM_DOMAIN() macroAlexandre Courbot2015-06-2211-22/+27
| | | | | | | | | Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative VRAM domains for chips that do not have dedicated video memory. Signed-off-by: Alexandre Courbot <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Martin Peres <[email protected]>
* nouveau: support for custom VRAM domainsAlexandre Courbot2015-06-222-0/+14
| | | | | | | | | | | | | | | | | | | | | Some GPUs (e.g. GK20A, GM20B) do not embed VRAM of their own and use the system memory as a backend instead. For such systems, allocating objects in VRAM results in errors since the kernel will not allow VRAM objects allocations. This patch adds a vram_domain member to struct nouveau_screen that can optionally be initialized to an alternative domain to use for VRAM allocations. If left untouched, NOUVEAU_BO_VRAM will be used for systems that embed VRAM, and NOUVEAU_BO_GART will be used for VRAM-less systems. Code that uses GPU objects is then expected to use the NV_VRAM_DOMAIN() macro in place of NOUVEAU_BO_VRAM to ensure correct behavior on VRAM-less chips. Signed-off-by: Alexandre Courbot <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Martin Peres <[email protected]>
* nvc0/ir: can't have a join on a load with an indirect sourceIlia Mirkin2015-06-171-1/+1
| | | | | | | | | | | Triggers an INVALID_OPCODE warning on GK208. Seems rare enough to not warrant verification on other chips. Fixes the new piglits: ubo_array_indexing/fs-nonuniform-control-flow.shader_test ubo_array_indexing/vs-nonuniform-control-flow.shader_test Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50,nvc0: clamp uniform size to 64kIlia Mirkin2015-06-152-4/+4
| | | | | | | | | | The state tracker will pass through requests from buggy applications which will have the buffer size larger than the max allowed (64k). Clamp the size to 64k so that we don't get errors when uploading the constbuf data. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nvc0/ir: fix collection of first uses for texture barrier insertionIlia Mirkin2015-06-151-5/+11
| | | | | | | | | | | | | One of the places we have to insert texbars is in situations where the result of the tex gets overwritten by a different instruction (e.g. in a conditional statement). However in some situations it can actually appear as though the original tex itself is an overwriting instruction. This can naturally never really happen, so just ignore the tex instruction when it comes up. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90347 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50/ir: OP_JOIN is a flow instructionJürgen Rühle2015-06-151-1/+1
| | | | | | | | | | | OP_JOIN instructions are assumed to be flow instructions and mercilessly casted to FlowInstruction. This patch fixes an instance where an OP_JOIN is created as a plain instruction. This can cause crashes in the ir printer. [imirkin: add ->fixed = 1] Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: use $(top_builddir) when referencing static archivesEmil Velikov2015-06-121-1/+1
| | | | | | Just like every other place in gallium. Signed-off-by: Emil Velikov <[email protected]>
* nouveau: set imported buffers to what the kernel gives usDave Airlie2015-06-101-1/+1
| | | | | | | | | | | | | When we import a dma-buf fd from another driver the kernel gives us the right info, and this trashes it. Convert the kernel bo flags into the domain flags. This helps getting reverse prime and glamor working. Cc: [email protected] Acked-by: Ben Skeggs <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* android: build with libcxx on android lollipopChih-Wei Huang2015-06-091-0/+4
| | | | | | | | On Lollipop, apparently stlport is gone and libcxx must be used instead. We still support stlport when building on earlier android releases. Signed-off-by: Chih-Wei Huang <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* tgsi/ureg: don't emit in/out arrays if drivers don't support ranged declarationsMarek Olšák2015-06-053-0/+4
| | | | | | Softpipe, llvmpipe, r300g, and radeonsi pass tests. Other drivers need testing. Freedreno and nv30 are definitely broken. Other drivers seem to be alright.
* nv30: falling back to draw path for edgeflag does no goodIlia Mirkin2015-05-251-3/+2
| | | | | | | | | The problem is that the EDGEFLAG has to be toggled at vertex submission time. This can be done from either the draw or the regular paths. Avoid falling back to draw just because there's an edgeflag. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30/draw: switch varying hookup logic to know about texcoordsIlia Mirkin2015-05-251-9/+16
| | | | | | | | | | | | Commit 8acaf862dfe switched things over to use TEXCOORD instead of GENERIC, but did not update the nv30 swtnl draw paths. This teaches the draw logic about TEXCOORD. Among other things, this fixes a crash in demos/arbocclude when using swtnl. Curiously enough, the point-sprite piglit works without this. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30/draw: allocate vertex buffers in gartIlia Mirkin2015-05-251-6/+10
| | | | | | | | | | These are only used once per draw, so it makes sense to keep them in GART. Also take this opportunity to modernize the buffer mapping API usage. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ben Skeggs <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAMIlia Mirkin2015-05-251-3/+3
| | | | | | | | | Instead of always having it in the data, let the bo placement decide it. This fixes glxgears with swtnl forced on. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ben Skeggs <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30/draw: fix indexed draws with swtnl path and a resource index bufferIlia Mirkin2015-05-251-3/+3
| | | | | | | The map = assignment was missing. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30/draw: draw expects constbuf size in bytes, not vec4 unitsIlia Mirkin2015-05-251-1/+1
| | | | | | | | This fixes glxgears with NV30_SWTNL=1 forced on. Probably fixes a bunch of other situations where we fall back to the swtnl path. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30/draw: avoid leaving stale pointers in draw stateIlia Mirkin2015-05-251-4/+4
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30: fix clip plane uploads and enable changesIlia Mirkin2015-05-241-9/+7
| | | | | | | | | | | | nv30_validate_clip depends on the rasterizer state. Also we should upload all the new clip planes on change since next time the plane data won't have changed, but the enables might. This fixes fixed-clip-enables and vs-clip-vertex-enables shader tests. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30: avoid doing extra work on clear and hitting unexpected statesIlia Mirkin2015-05-245-9/+11
| | | | | | | | | | | | Clearing can happen at a time when various state objects are incoherent and not ready for a draw. Some of the validation functions don't handle this well, so only flush the framebuffer state. This has the advantage of also not doing extra work. This works around some crashes that can happen when clearing. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]>
* nv30: avoid leaking render state and draw shadersIlia Mirkin2015-05-243-0/+16
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30: don't leak fragprog constsIlia Mirkin2015-05-241-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50/ir: avoid messing up arg1 of PFETCHIlia Mirkin2015-05-231-2/+18
| | | | | | | | | | | | | | There can be scenarios where the "indirect" arg of a PFETCH becomes known, and so the code will attempt to propagate it. Use this opportunity to just fold it into the first argument, and prevent the load propagation pass from touching PFETCH further. This fixes gs-input-array-vec4-index-rd.shader_test and vs-output-array-vec4-index-wr-before-gs.shader_test on nvc0 at least. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv30: check nouveau_bo_map output of notify boIlia Mirkin2015-05-231-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: a geometry shader can have up to 1024 vertices outputIlia Mirkin2015-05-231-1/+1
| | | | | | | | The 1024 is already reported everywhere, not sure where this 0x1ff came from. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50: fix PIPE_QUERY_TIMESTAMP_DISJOINT, based on nvc0Samuel Pitoiset2015-05-231-17/+22
| | | | | | | | | PIPE_QUERY_TIMESTAMP_DISJOINT could not work because q->ready was always set to FALSE. To fix this issue, add more different states for queries according to nvc0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: LOAD's can't be used for shader inputsIlia Mirkin2015-05-222-0/+2
| | | | | | | | | | We forgot to convert to VFETCH in case of indirect access. Fix that. This avoids crashes on the new gs-input-array-vec4-index-rd and vs-output-array-vec4-index-wr-before-gs but they still fail. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50/ir: guess that the constant offset is the starting slot of arrayIlia Mirkin2015-05-221-2/+4
| | | | | | | | When we get something like IN[ADDR[0].x+5], we will now guess that we should look at IN[5] for the "base" information. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nvc0/ir: set ftz when sources are floats, not just destinationsIlia Mirkin2015-05-221-3/+2
| | | | | | | | In the case of a compare, the destination might be a predicate, but we still want to flush denorms. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50/ir: allow OP_SET to merge with OP_SET_AND/etc as well as a negIlia Mirkin2015-05-221-26/+55
| | | | | | | | | | | | | | | | | | | | This covers the pattern where a KILL_IF is used, which triggers a comparison of -x to 0. This can usually be folded into the comparison whose result is being compared to 0, however it may, itself, have already been combined with another comparison. That shouldn't impact the logic of this pass however. With this and the & 1.0 change, code like 00000020: 001c0001 80081df4 set b32 $r0 lt f32 $r0 0x3e800000 00000028: 001c0000 201fc000 and b32 $r0 $r0 0x3f800000 00000030: 7f9c001e dd885c00 set $p0 0x1 lt f32 neg $r0 0x0 00000038: 0000003c 19800000 $p0 discard becomes 00000020: 001c001d b5881df4 set $p0 0x1 lt f32 $r0 0x3e800000 00000028: 0000003c 19800000 $p0 discard Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: optimize set & 1.0 to produce boolean-float setsIlia Mirkin2015-05-222-0/+29
| | | | | | | | This has started to happen more now that the backend is producing KILL_IF more often. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]>
* nvc0/ir: allow iset to produce a boolean floatIlia Mirkin2015-05-223-5/+16
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: avoid jumping to a sched instructionIlia Mirkin2015-05-223-2/+9
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: fix PIPELINE_STATISTICS with HUD, based on nvc0Samuel Pitoiset2015-05-221-1/+2
| | | | | | | Tested on NVA8. No regression for ARB_pipeline_statistics piglit tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: fix 64-bit queries with HUD, based on nvc0Samuel Pitoiset2015-05-221-1/+13
| | | | | | | | | A sequence number is written for 32-bits queries to make sure they are ready, but not for 64-bits queries. Instead, we have to use a fence in order to fix the HUD because it doesn't wait until the result is ready. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: remove TGSI_SAT_MINUS_PLUS_ONEMarek Olšák2015-05-203-15/+4
| | | | | | | | It's a remnant of some old NV extension. Unused. I also have a patch that removes predicates if anyone is interested. Reviewed-by: Roland Scheidegger <[email protected]>
* gk110/ir: switch to gk104-style sched codes rather than all-in-oneIlia Mirkin2015-05-181-9/+9
| | | | | | Matches change to envydis/envyas tools. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: remove unused nv50_tsc_wrap_mode() functionSamuel Pitoiset2015-05-141-18/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
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