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* nv50/ir: replace zeros in movs as wellIlia Mirkin2015-12-031-2/+1
* nv50/ir: fold fma/mad when all 3 args are immediatesIlia Mirkin2015-12-031-0/+30
* nv50/ir: avoid looking at uninitialized srcMods entriesIlia Mirkin2015-12-032-2/+2
* nv50/ir: fix DCE to not generate 96-bit loadsIlia Mirkin2015-12-031-1/+31
* nv50/ir: fix moves to/from flagsIlia Mirkin2015-12-022-2/+7
* nv50/ir: don't forget to mark flagsDef on cvt in txb loweringIlia Mirkin2015-12-021-1/+1
* nv50/ir: fix instruction permutation logicIlia Mirkin2015-12-021-1/+1
* nv50/ir: the mad source might not have a defining instructionIlia Mirkin2015-12-021-1/+1
* nv50/ir: make sure entire graph is reachableIlia Mirkin2015-12-021-0/+1
* nv50/ir: deal with loops with no breaksIlia Mirkin2015-12-021-0/+6
* nvc0/ir: fold postfactor into immediateIlia Mirkin2015-12-021-0/+6
* nv50/ir: allow immediate 0 to be loaded anywhereIlia Mirkin2015-12-021-0/+6
* nv50/ir/gk110: add memory barriers support for GK110Samuel Pitoiset2015-12-021-0/+12
* nv50/ir: do not call textureMask() for surface opsSamuel Pitoiset2015-12-021-1/+2
* nv50,nvc0: allow to create resources other than buffersSamuel Pitoiset2015-12-015-4/+9
* nv50/ir: always display the opcode number for unknown instructionsSamuel Pitoiset2015-11-292-2/+2
* nouveau: move interlaced assert down in nouveau_vp3_video_buffer_createJulien Isorce2015-11-251-1/+1
* nv50/ir: fix (un)spilling of 3-wide resultsIlia Mirkin2015-11-221-4/+42
* nv50,nvc0: properly handle buffer storage invalidation on dsa bufferIlia Mirkin2015-11-222-15/+17
* nouveau: use the buffer usage to determine placement when no bindingIlia Mirkin2015-11-221-2/+6
* nv50: expose two groups of compute-related MP perf countersSamuel Pitoiset2015-11-206-2/+63
* gallium: add the concept of batch queriesNicolai Hähnle2015-11-202-0/+2
* gallium: remove pipe_driver_query_group_info field typeNicolai Hähnle2015-11-201-4/+0
* nv50: allow using inline vertex data submit when gl_VertexID is usedSamuel Pitoiset2015-11-195-15/+46
* nv50: add NV84_3D macroSamuel Pitoiset2015-11-193-3/+4
* nvc0/ir: actually emit AFETCH on keplerIlia Mirkin2015-11-181-0/+3
* nv50: add missing header into the sources listEmil Velikov2015-11-161-0/+1
* nv50,nvc0: disable render condition around clear_* functionsIlia Mirkin2015-11-144-0/+32
* nv50: add support for performance metrics on G84+Samuel Pitoiset2015-11-144-3/+259
* nv50: add compute-related MP perf counters on G84+Samuel Pitoiset2015-11-149-2/+548
* nv50: implement a basic compute supportSamuel Pitoiset2015-11-1410-9/+1006
* nv50: free interpolation parameters in nv50_program_destroy()Samuel Pitoiset2015-11-141-1/+1
* nvc0: reduce the number of GPR used when reading MP perf countersSamuel Pitoiset2015-11-141-1/+2
* nouveau: don't expose HEVC decoding supportIlia Mirkin2015-11-141-0/+1
* nvc0/ir: add support for TGSI_SEMANTIC_HELPER_INVOCATIONIlia Mirkin2015-11-126-0/+6
* nv50,nvc0: add ARB_clear_texture supportIlia Mirkin2015-11-115-7/+101
* gallium: add PIPE_CAP_CLEAR_TEXTURE and clear_texture prototypeIlia Mirkin2015-11-113-0/+3
* nvc0: enable compute support on FermiSamuel Pitoiset2015-11-081-2/+2
* nv50/ir: fix emission of s[] args in certain situationsIlia Mirkin2015-11-071-2/+2
* nv50/ir: only take abs value when computing high resultIlia Mirkin2015-11-071-1/+1
* nouveau: avoid queueing too much work onto a single fenceIlia Mirkin2015-11-072-26/+43
* nv50/ir: allow emission of immediates in imul/imad opsIlia Mirkin2015-11-071-2/+8
* nv50/ir: properly set the type of the constant folding resultIlia Mirkin2015-11-061-4/+4
* nv50/ir: add support for const-folding OP_CVT with F64 source/destIlia Mirkin2015-11-063-0/+45
* nv50/ir: add fp64 opcode emission support for G200 (NVA0)Ilia Mirkin2015-11-061-10/+84
* nv50/ir: Add support for 64bit immediates to checkSwapSrc01Hans de Goede2015-11-061-5/+6
* nvc0/ir: Teach insnCanLoad about double immediatesHans de Goede2015-11-061-6/+19
* nv50/ir: Add support for merge-s to the ConstantFolding passHans de Goede2015-11-061-0/+15
* nv50/ir: disallow 64-bit immediates on nv50 targetsIlia Mirkin2015-11-061-1/+1
* nv50/ir: allow movs with TYPE_F64 destinations to be splitIlia Mirkin2015-11-061-0/+6
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