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* gm200/ir: optimize rcp(sqrt) to rsqKarol Herbst2018-08-041-1/+10
* gm200/ir: add native OP_SQRT supportKarol Herbst2018-08-044-2/+14
* gallium: add storage_sample_count parameter into is_format_supportedMarek Olšák2018-07-314-0/+13
* gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTSMarek Olšák2018-07-313-0/+3
* nvc0: serialize before updating some constant buffer bindings on Maxwell+Rhys Perry2018-07-304-47/+81
* nv50/ir: move LateAlgebraicOpt back to right after ConstantFoldingRhys Perry2018-07-191-1/+1
* nv50/ir: handle SHLADD in IndirectPropagationRhys Perry2018-07-191-0/+12
* gm107/ir: use CS2R for SV_CLOCKRhys Perry2018-07-193-2/+25
* nouveau: fix 3D blitter for unsigned to signed integer conversionsKarol Herbst2018-07-152-10/+22
* nv50/ir: fix Instruction::isActionEqual for PHI instructionsKarol Herbst2018-07-071-0/+6
* nvc0/ir: use the combined tid special registerRhys Perry2018-07-079-0/+61
* nvc0: implement multisampled images on Maxwell+Rhys Perry2018-07-046-39/+48
* nv50/ir: handle clipvertex for geom and tess shaders as wellKarol Herbst2018-07-021-1/+6
* gallium/util: remove dummy function util_format_is_supportedMarek Olšák2018-06-293-10/+0
* nv50/ir: improve maintainability of Target*::initOpInfo()Rhys Perry2018-06-292-23/+28
* nv50/ir: fix image stores with indirect handlesRhys Perry2018-06-291-4/+5
* nvc0: remove magic values in nve4_set_tex_handles()Rhys Perry2018-06-281-1/+1
* nvc0/ir: fix TargetNVC0::insnCanLoadOffset()Rhys Perry2018-06-281-0/+1
* nv50/ir: only avoid spilling constrained def if a mov is addedKarol Herbst2018-06-231-2/+2
* gallium: add scalar isa shader capChristian Gmeiner2018-06-203-0/+6
* nvc0: add support for programmable sample locationsRhys Perry2018-06-1410-46/+299
* gallium: add support for programmable sample locationsRhys Perry2018-06-143-0/+3
* nv30: add a couple of missed shader capsIlia Mirkin2018-05-301-0/+2
* nv30: ensure that displayable formats are marked accordinglyIlia Mirkin2018-05-301-4/+6
* gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITYMarek Olšák2018-05-293-0/+5
* gallium/winsys: rename DRM_API_HANDLE_* to WINSYS_HANDLE_*Dave Airlie2018-05-301-6/+6
* nv50/ir: Extend ImmediateValue::applyLog2 to 64-bit integersPierre Moreau2018-05-291-1/+10
* gm107/ir: prevent WaW hazards in instruction schedulingRhys Perry2018-05-281-54/+57
* nvc0: fix setting of subpixel precision during conservative rasterizationRhys Perry2018-05-132-2/+2
* nv50/ir: fix printing of pixldRhys Perry2018-05-031-1/+1
* nv50: Extract needed value bits without shifting them before calling bitcountVlad Golovkin2018-05-021-1/+1
* nvc0: add conservative rasterization supportRhys Perry2018-04-307-8/+87
* gallium: add initial support for conservative rasterizationRhys Perry2018-04-303-0/+30
* nvc0/ir: all short immediates are sign-extended, adjust LIMM testIlia Mirkin2018-04-243-19/+24
* gm107/ir/lib: fix sched in div u32 builtinKarol Herbst2018-04-242-4/+4
* nv50/ir: make a copy of tex src if it's referenced multiple timesIlia Mirkin2018-04-221-37/+49
* nv50/ir/ra: prefer def == src2 for fma with immediates on nvc0Karol Herbst2018-04-211-10/+29
* nvc0: fix line width on GM20x+Rhys Perry2018-04-201-1/+4
* nvc0: finish implementation of PIPE_QUERY_SO_OVERFLOW_PREDICATERhys Perry2018-04-073-17/+30
* nvc0: change ACQUIRE_EQUAL to ACQUIRE_GEQUAL in nvc0_hw_query_fifo_waitRhys Perry2018-04-071-1/+1
* nvc0: ensure the query's fence has been emitted in nvc0_hw_query_fifo_waitRhys Perry2018-04-071-0/+4
* nvc0: restore image binding on RGB10A2, remove from BGR10A2Ilia Mirkin2018-04-071-2/+2
* util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_t...Ian Romanick2018-03-294-7/+7
* nvc0/ir: fix emiting NOTs with predicatesKarol Herbst2018-03-291-0/+2
* nvc0/ir: fix INTERP_* with indirect inputsIlia Mirkin2018-03-271-3/+4
* gallium: add packed uniform CAPTimothy Arceri2018-03-203-0/+3
* nv50,nvc0: Support BGRX1010102 and RGBX1010102 for sampling.Mario Kleiner2018-03-141-0/+2
* nouveau: Add framebuffer modifier supportThierry Reding2018-03-096-5/+146
* nouveau/nvc0: Extract common tile mode macroThierry Reding2018-03-091-6/+9
* nvc0: collapse output slots to have adjacent registersIlia Mirkin2018-02-271-2/+12
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