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* gallium: add support for GLES texture float extensions (v3)Marek Olšák2015-08-143-0/+6
| | | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74329 v2: add a CAP for half floats drivers should not expose the CAPs if they don't support the formats v3: update relnotes Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* nvc0/ir: cache vertex out base so that we don't recompute againIlia Mirkin2015-07-291-8/+15
| | | | | | | | The global CSE pass stinks and is unable to pull this out. Easy enough to handle it here and avoid generating unnecessary special register loads (which can allegedly be quite slow). Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: output base for reading is based on laneidIlia Mirkin2015-07-291-0/+25
| | | | | | | | | | | PFETCH retrieves the address for incoming vertices, not output vertices in TCS. For output vertices, we must use the laneid as a base. Fixes barrier piglit test, which was failing for entirely non-barrier reasons, but rather that it was (a) trying to draw multiple patches and (b) the incoming patch size was not the same as the outgoing patch size. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: trim out barrier sync for non-compute shadersIlia Mirkin2015-07-281-0/+6
| | | | | | | It seems like they're never necessary, and actively cause harm. This fixes some of the barrier-related piglits. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: fix barrier emissionIlia Mirkin2015-07-281-0/+2
| | | | | | immediate arguments require a flag to be set for each one Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: fix geometry program revalidation of clipping paramsIlia Mirkin2015-07-251-1/+1
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected]
* nvc0/ir: per-patch vars are in a separate address spaceIlia Mirkin2015-07-242-11/+9
| | | | | | | | | | | | | There's no need to attempt to avoid overlapping generic i/o with patch i/o. By the same token, we can't merge patch and non-patch loads/stores. This fixes at least the tes-both-input-array-*-index-rd tessellation variable-indexing tests. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: kepler can't do indirect shader input/output loads directlyIlia Mirkin2015-07-238-6/+75
| | | | | | | | | | | | | | There's a special AL2P instruction (called AFETCH in nv50 ir) which computes a "physical" value to be used with indirect addressing with ALD. Fixes tcs-input-array-*-index-rd tcs-output-array-*-index-wr varying-indexing tessellation tests on Kepler. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: tess factors are now sysvals, adapt codegen to expect thatIlia Mirkin2015-07-236-11/+24
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* gk110/ir: fake BAR supportIlia Mirkin2015-07-231-0/+12
| | | | | | Makes things sorta work until we figure out the real way to do this. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: cleanup private enums that have graduated to galliumIlia Mirkin2015-07-232-7/+0
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: allow tess eval output loads to be CSE'dIlia Mirkin2015-07-231-0/+2
| | | | | | These only happen for gl_TessCoord which are constant. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add hazard for 2nd dim of vfetch/load indirect argumentIlia Mirkin2015-07-231-0/+2
| | | | | | | Apparently a multi-word load can potentially overwrite the indirect sources, so make sure that RA picks different registers for those. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: patch vertex count is stored in the upper bitsIlia Mirkin2015-07-231-0/+4
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* nvc0/ir: add support for reading outputs in tess control shadersIlia Mirkin2015-07-232-2/+18
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: set perPatch flag on load/stores to per-patch varyingsIlia Mirkin2015-07-231-2/+6
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: populate info structure based on new tess propertiesIlia Mirkin2015-07-231-0/+18
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: mark varyings as per-patch based on semantic nameIlia Mirkin2015-07-232-4/+16
| | | | | | Also add proper handling for PATCH semantics Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: TESSCOORD comes in as a sysval, not an inputIlia Mirkin2015-07-232-11/+10
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add handling for set_tess_state callbackIlia Mirkin2015-07-233-0/+34
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add support for setting patch vertices at draw timeIlia Mirkin2015-07-234-3/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: support MAX_SHADER_PATCH_VARYINGSIlia Mirkin2015-07-231-1/+2
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* nvc0: preliminary tess supportIlia Mirkin2015-07-2310-54/+86
| | | | | | | Uncomment the various functionality that was already there and add in obvious missing bits that parallel vp/gp/fp functionality. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: replace INLINE with inlineIlia Mirkin2015-07-2164-249/+249
| | | | | | | | | | | | | | | | Generated by running: git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g' git grep -l INLINE src/mesa/state_tracker/ | xargs sed -i 's/\bINLINE\b/inline/g' git checkout src/gallium/state_trackers/clover/Doxyfile and manual edits to src/gallium/include/pipe/p_compiler.h src/gallium/README.portability to remove mentions of the inline define. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Marek Olšák <[email protected]>
* nvc0: force cache flush when binding a new uboSamuel Pitoiset2015-07-211-0/+2
| | | | | | | | This fixes the following piglit test: ext_transform_feedback-immediate-reuse-uniform-buffer Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: force cache flush when binding a new uboSamuel Pitoiset2015-07-211-0/+2
| | | | | | | | This fixes the following piglit test: ext_transform_feedback-immediate-reuse-uniform-buffer Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: use bool instead of booleanSamuel Pitoiset2015-07-2169-678/+678
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: add a missing parameter to nvc0_set_shader_images()Samuel Pitoiset2015-07-201-3/+3
| | | | | | | | | | | This fixes a compilation warning introduced in commit 05a12c5 (gallium: add interface for writable shader images). While we are at it, fix indentation and rename parameters according to the gallium interface. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: always align buffers to 0x100Samuel Pitoiset2015-07-201-7/+1
| | | | | | | | | | | | | | Only constbufs must be aligned to 0x100, but since all buffers can be rebinded as constant buffers they must be also aligned. This patch prevents this behaviour by aligning everything to 256-byte increments at buffer creation. This fixes dmesg fails for the following piglit test: ext_transform_feedback-immediate-reuse-uniform-buffer -auto -fbo Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: limit the maximum number of samplers to 16Samuel Pitoiset2015-07-201-1/+1
| | | | | | | | | | | | | | NV50_3D_BIND_TSC only allows to bind 16 samplers, and since we don't want to do anything with NV50_3D_BIND_TSC2, just limit the maximum number of samplers to 16 like for nvc0. This fixes dmesg fails with the following piglit test: max-samplers But the test still fails. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: turn samples counts off during blitSamuel Pitoiset2015-07-201-0/+11
| | | | | | | | Fixes the following piglit test: occlusion_query_meta_no_fragments Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: add nesting support for occlusion queriesSamuel Pitoiset2015-07-202-11/+20
| | | | | | | This is loosely based on nvc0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: fix max level clamping on G80Ilia Mirkin2015-07-201-2/+9
| | | | | | | | | It appears that the G80 did not have support for the sampler view first/last clamping. Put the view's last level in the place of the texture's so that it doesn't go past what the sampler view allows. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* gm107/ir: fix indirect txq emissionIlia Mirkin2015-07-181-2/+8
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0/ir: don't worry about sampler in txq handlingIlia Mirkin2015-07-181-22/+8
| | | | | | | | | There's no need to deal with samplers for texture size queries. That code also was accidentally setting an invalid sIndirectSrc position, but it can now just be removed. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0/ir: fix txq on indirect samplersIlia Mirkin2015-07-182-2/+56
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* gallium: add interface for writable shader imagesMarek Olšák2015-07-161-4/+6
| | | | | | PIPE_CAPs will be added some other time. Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: add BIND flags for R/W buffers and imagesMarek Olšák2015-07-163-3/+5
| | | | | | | | | | | | | | | | | PIPE_CAPs and TGSI support will be added later. The TGSI support should be straightforward. We only need to split TGSI_FILE_RESOURCE into TGSI_FILE_IMAGE and TGSI_FILE_BUFFER, though duplicating all opcodes shouldn't be necessary. The idea is: * ARB_shader_image_load_store should use set_shader_images. * ARB_shader_storage_buffer_object should use set_shader_buffers(slots 0..M-1) if M shader storage buffers are supported. * ARB_shader_atomic_counters should use set_shader_buffers(slots M..N) if N-M+1 atomic counter buffers are supported. PIPE_CAPs can describe various constraints for early DX11 hardware. Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGSMarek Olšák2015-07-163-0/+3
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50, nvc0: enable at least one color RT if alphatest is enabledIlia Mirkin2015-07-102-0/+36
| | | | | | | | | Fixes the following piglits: fbo-alphatest-nocolor fbo-alphatest-nocolor-ff Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nv50: avoid segfault with enabled but unbound vertex attribSamuel Pitoiset2015-07-081-0/+5
| | | | | | | | | | | Before validating vertex arrays we need to check if a VBO is present. Checking if vb->buffer is not NULL fixes the issue. Fixes the following piglit test: gl-3.1-vao-broken-attrib Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: fix wrong use of BLIT_SRC_Y_INT for 2D texture copySamuel Pitoiset2015-07-081-1/+1
| | | | | | | | | | According to nv50, this should be src->ms_y instead of src->ms_x. This code is here since 2012, so it's probably a typo error which has never been detected since a long time. I didn't do a full piglit run to check if it fixes some other weird issues. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: turn sample counts off during blitIlia Mirkin2015-07-071-0/+7
| | | | | | | | | Fixes the following piglits: occlusion_query_meta_fragments occlusion_query_meta_no_fragments Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* gallium: remove redundant pipe_context::fence_signalledMarek Olšák2015-07-051-8/+0
| | | | | | fence_finish(timeout=0) does the same thing Reviewed-by: Brian Paul <[email protected]>
* gallium: handle fence_finish timeout in various driversMarek Olšák2015-07-051-0/+3
| | | | | | I copied what fence_signalled does. Reviewed-by: Brian Paul <[email protected]>
* nv50/ir: UCMP arguments are float, so make sure modifiers are appliedIlia Mirkin2015-07-031-1/+2
| | | | | | | | | The first argument to UCMP needs to be compared against 0, but the latter arguments are treated as float and need to be able to properly apply neg/abs arguments. Adjust the inferSrcType function accordingly. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nv50/ir: don't emit src2 in immediate formIlia Mirkin2015-07-021-2/+2
| | | | | | | | | In the immediate form, src2 == dst, so it does not need to be emitted. Otherwise it overlaps with the immediate value's low bits. Fixes: 09ee907266 (nv50/ir: Fold IMM into MAD) Cc: "10.6" <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capabilityAlexandre Courbot2015-07-011-1/+2
| | | | | | | | | | Prefer blit-based texture transfers only if the chip has dedicated VRAM since it would translate to a copy into the same memory on shared-memory chips. Signed-off-by: Alexandre Courbot <[email protected]> Reported-by: Ilia Mirkin <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: create screen fence objects with coherent attributeAlexandre Courbot2015-07-021-2/+6
| | | | | | | | | | | | | | | This is required on non-coherent architectures to ensure the value of the fence is correct at all times. Failure to do this results in the display freezing for a few seconds every now and then on Tegra. The NOUVEAU_BO_COHERENT is a no-op for coherent architectures, so behavior on x86 should not be affected by this patch. Also bump the required libdrm version to 2.4.62, which introduced this flag. Signed-off-by: Alexandre Courbot <[email protected]> Reviewed-by: Martin Peres <[email protected]>
* nv50/ir: copy joinAt when splitting both before and afterIlia Mirkin2015-07-013-0/+5
| | | | | | | | | | | | | | | | | | | | | The current implementation only moves the joinAt when splitting after the given instruction, not before it. So if you have a BB with foo instr bar joinat and thus with joinAt set, we end up first splitting before instr, at which point the instr's bb is updated to the new bb. Since that bb doesn't have a joinAt set (despite containing one), when splitting after the instr, there is nothing to copy over. Since the joinat will be in the "split" bb irrespective of whether we're splitting before or after the instruction, move it over in either case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91124 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
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