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* nv50/ir: 64-bit splitting fixesIlia Mirkin2016-01-201-1/+2
* gk110/ir: allow carry to be set/read by imadIlia Mirkin2016-01-201-0/+4
* gm107/ir: add carry emission to LOP and IADDIlia Mirkin2016-01-201-0/+4
* gm107/ir: add ATOM and CCTL supportIlia Mirkin2016-01-201-0/+52
* gm107/ir: set LD/ST address width bitIlia Mirkin2016-01-201-0/+2
* gk110/ir: fix double-wide vm addressIlia Mirkin2016-01-201-0/+4
* gk110/ir: add OP_CCTL handlingIlia Mirkin2016-01-201-0/+35
* gk110/ir: add atomic op emission, fix gmem loadsIlia Mirkin2016-01-201-5/+65
* nv50/ir: don't flip SHL(ADD) into ADD(SHL) if ADD sources have modifiersIlia Mirkin2016-01-201-0/+2
* gk110/ir: fix load from shared memoryIlia Mirkin2016-01-201-1/+1
* gk110/ir: add partial BAR supportIlia Mirkin2016-01-201-2/+18
* nv50/ir: swap the least-ref'd source into src1 when both const/immIlia Mirkin2016-01-181-10/+15
* gm107/ir: don't do indirect frag shader inputs on GM107Ilia Mirkin2016-01-171-0/+1
* nvc0: bsp_bo can't be nullIlia Mirkin2016-01-171-1/+1
* nv50/ir: add saturate support on ex2Ilia Mirkin2016-01-162-0/+6
* nv50/ir: rebase indirect temp arrays to 0, so that we use less lmem spaceIlia Mirkin2016-01-141-14/+44
* nv50/ir: only use FILE_LOCAL_MEMORY for temp arrays that use indirectionIlia Mirkin2016-01-141-15/+50
* nvc0/ir: be careful about propagating very large offsets into const loadIlia Mirkin2016-01-144-1/+19
* nvc0: allow fragment shader inputs to use indirect indexingIlia Mirkin2016-01-141-1/+1
* gallium/st: add pipe_context::generate_mipmap()Charmaine Lee2016-01-143-0/+3
* gallium: add PIPE_CAP_INVALIDATE_BUFFERNicolai Hähnle2016-01-143-0/+3
* nvc0: do not force re-binding of compute constbufs on FermiSamuel Pitoiset2016-01-121-1/+1
* nvc0: remove useless goto in nvc0_launch_grid()Samuel Pitoiset2016-01-121-6/+4
* nv50/ir: the whole point of data array is to hand out regular registersIlia Mirkin2016-01-111-1/+1
* nv50/ir: Fix scratch allocation size and filePierre Moreau2016-01-092-3/+3
* nv50,nvc0: use a face sysval to avoid the useless back-and-forth conversionIlia Mirkin2016-01-085-9/+2
* gallium: add PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENTIlia Mirkin2016-01-083-0/+3
* gallium: add PIPE_SHADER_CAP_MAX_SHADER_BUFFERSIlia Mirkin2016-01-083-0/+4
* tgsi: add ureg support for image declsIlia Mirkin2016-01-081-3/+9
* gallium: add caps for POSITION and FACE system valuesMarek Olšák2016-01-083-0/+6
* nvc0: add ARB_indirect_parameters supportIlia Mirkin2016-01-075-6/+313
* nvc0: add support for real ARB_multi_draw_indirectIlia Mirkin2016-01-074-18/+47
* nvc0: adjust indirect draw macros to handle multiple draws at onceIlia Mirkin2016-01-073-52/+101
* gallium: add caps to expose support for multi indirect drawsIlia Mirkin2016-01-073-0/+6
* draw: nuke the interp parameter from vertex_infoRoland Scheidegger2016-01-071-8/+7
* nvc0: add support for st/vaJulien Isorce2016-01-053-50/+133
* nouveau: split nouveau_vp3_bsp in begin/next/endJulien Isorce2016-01-054-41/+77
* nvc0: scale up inter_bo size so that it's 16M for a 4K videoIlia Mirkin2016-01-041-2/+5
* nv50,nvc0: fix crash when increasing bsp bo size for h264Ilia Mirkin2016-01-042-4/+4
* nvc0/ir: add support for PK2H/UP2HIlia Mirkin2016-01-034-2/+28
* gallium: add PIPE_CAP_TGSI_PACK_HALF_FLOAT to indicate UP2H/PK2H supportIlia Mirkin2016-01-033-0/+3
* nv50,nvc0: optimize coherent buffer checking at draw timeSamuel Pitoiset2016-01-036-68/+82
* nv50,nvc0: make sure there's pushbuf space and that we ref the bo earlyIlia Mirkin2016-01-014-6/+5
* nvc0: Set winding order regardless of domain.Kenneth Graunke2015-12-301-2/+4
* nvc0: add ARB_shader_draw_parameters supportIlia Mirkin2015-12-3013-15/+73
* gallium: add PIPE_CAP_DRAW_PARAMETERSIlia Mirkin2015-12-303-0/+3
* nv50/ir: attempt to do more constant folding on mad -> add conversionIlia Mirkin2015-12-301-11/+10
* nv50/ir: float(s32 & 0xff) = float(u8), not s8Ilia Mirkin2015-12-291-0/+3
* nvc0: don't forget to reset VTX_TMP bufctx slot after blit completionIlia Mirkin2015-12-271-0/+2
* nv50,nvc0: add a note when converting vertex elements using CPUIlia Mirkin2015-12-272-0/+6
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