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* nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin2016-05-311-4/+4
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
* nvc0/ir: limit max number of regs based on availability in SMIlia Mirkin2016-05-302-2/+4
* nv50/ir: record number of threads in a compute shaderIlia Mirkin2016-05-305-2/+10
* nv50/ir: Add missing handling of U64/S64 in inlinesPierre Moreau2016-05-301-1/+3
* nvc0/ir: fix emission of predicate spill to registerIlia Mirkin2016-05-301-1/+2
* nvc0: fix some compute texture validation bits on keplerIlia Mirkin2016-05-303-2/+7
* gallium: push offset down to driverStanimir Varbanov2016-05-301-0/+6
* nv50,nvc0: fix the max_vertices=0 caseIlia Mirkin2016-05-293-2/+4
* gk110/ir: fix unspilling of predicates from registersIlia Mirkin2016-05-281-0/+28
* nvc0: remove outdated surfaces validation code for GK104Samuel Pitoiset2016-05-281-70/+0
* nvc0: do not always invalidate 3D CBs when using computeSamuel Pitoiset2016-05-281-8/+17
* nouveau: enable GL 4.3 on kepler/fermiDave Airlie2016-05-281-1/+1
* nvc0/ir: handle a load's reg result not being used for locked variantsIlia Mirkin2016-05-263-11/+45
* nvc0/ir: avoid generating illegal instructions for compute constbuf loadsIlia Mirkin2016-05-261-1/+2
* nvc0: invalidate textures/samplers between 3D and CP on FermiSamuel Pitoiset2016-05-262-0/+27
* nvc0: allow to monitor MP perf counters with compute shadersSamuel Pitoiset2016-05-262-19/+55
* nvc0: add note about where the viewport mask would goIlia Mirkin2016-05-261-0/+1
* nvc0: enable 32 textures on kepler+Ilia Mirkin2016-05-262-3/+3
* nvc0: add descriptions for hardware perf counters/metricsSamuel Pitoiset2016-05-252-70/+353
* nvc0: expose robust buffer accessIlia Mirkin2016-05-231-1/+1
* gallium: Add a pipe cap for whether primitive restart works for patches.Kenneth Graunke2016-05-233-0/+3
* nvc0: do not invalidate compute constbufs on KeplerSamuel Pitoiset2016-05-231-4/+6
* nv30: don't assert when running out of registersIlia Mirkin2016-05-222-3/+1
* nouveau: allow allocating non-object-backed buffersIlia Mirkin2016-05-221-4/+1
* nvc0/ir: fix indirect access for imagesSamuel Pitoiset2016-05-221-8/+14
* nv30: reset the stencil mask when fast-clearingIlia Mirkin2016-05-221-1/+6
* nv30,nv50: add PIPE_SHADER_CAP_PREFERRED_IR supportIlia Mirkin2016-05-222-6/+12
* nvc0: fix setting of tess_mode in various situationsIlia Mirkin2016-05-221-4/+14
* nv50/ir: fix prog info initIlia Mirkin2016-05-221-3/+1
* nvc0/ir: return 0 for gl_TessCoord.z for non-triangles modesIlia Mirkin2016-05-221-0/+4
* nvc0: expose GLSL version 420 on GF100Samuel Pitoiset2016-05-211-1/+1
* nvc0: enable ARB_shader_image_load_store on GF100Samuel Pitoiset2016-05-211-0/+3
* nvc0/ir: add a lowering pass for surfaces on FermiSamuel Pitoiset2016-05-212-0/+117
* nvc0/ir: add emission for SULDB and SUSTxSamuel Pitoiset2016-05-211-2/+44
* nvc0/ir: add emission for OP_SULEASamuel Pitoiset2016-05-211-0/+58
* nv50/ir: fix tex constraints for surface coords on FermiSamuel Pitoiset2016-05-211-0/+6
* nv50/ir: use moveSources to condense sourcesIlia Mirkin2016-05-211-6/+1
* nvc0: bind images on fragment and compute shaders for FermiSamuel Pitoiset2016-05-214-7/+196
* nvc0/ir: don't check the format for surface stores on KeplerSamuel Pitoiset2016-05-211-8/+7
* nv50/ir: fix a comment in canDualIssue()Samuel Pitoiset2016-05-211-1/+1
* nv50/ir: fix SUSTx constraints on KeplerSamuel Pitoiset2016-05-211-3/+1
* nvc0: account for shader-allocated local memory needsIlia Mirkin2016-05-192-2/+2
* nv50/ir: treat addresses as localIlia Mirkin2016-05-191-1/+1
* Treewide: Remove Elements() macroJan Vesely2016-05-175-9/+9
* nvc0/ir: fix shared atomic lowering to preserve shared memory locationIlia Mirkin2016-05-171-10/+8
* nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 resultIlia Mirkin2016-05-171-1/+26
* nv50/ir: avoid asserts when the state tracker feeds us bogus inputsIlia Mirkin2016-05-151-12/+48
* nvc0: don't try to go through the push path for indirect drawsIlia Mirkin2016-05-151-1/+2
* nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEXIlia Mirkin2016-05-151-0/+14
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